74LVTH162240
器件描述：Low Voltage 16-Bit Inverting Buffer/Line Driver with 3-STATE Outputs and 25ヘ Series Resistors in the Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：53.54KB，共6页
Sponsor by e络盟器件资料摘要：
© 1999 Fairchild Semiconductor Corporation DS012490 www.fairchildsemi.com
June 1999
Revised June 1999
7
4
L
V
T1
62240
• 74L
VTH162240
Low
V
o
l
t
ag
e 16-
Bit
I
nver
ti
ng Buf
f
er
/Li
ne
D
r
ive
r
w
i
th
3-
S
T
A
T
E
O
u
t
put
s and
25
Ω
Ser
i
es
Resi
stor
s i
n
the
Output
s
74LVT162240 • 74LVTH162240
Low Voltage 16-Bit Inverting Buffer/Line Driver
with 3-STATE Outputs and
25Ω Series Resistors in the Outputs
General Description
The LVT162240 and LVTH162240 contain sixteen inverting
buffers with 3-STATE outputs designed to be employed as
a memory and address driver, clock driver, or bus oriented
transmitter/receiver. The device is nibble controlled. Indi-
vidual 3-STATE control inputs can be shorted together for
8-bit or 16-bit operation.
The LVT162240 and LVTH162240 are designed with
equivalent 25Ω series resistance in both the HIGH and
LOW states of the output. This design reduces line noise in
applications such as memory address drivers, clock driv-
ers, and bus transceivers/transmitters.
The LVTH162240 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These inverting buffers and line drivers are designed for
low-voltage (3.3V) V
CC
applications, but with the capability
to provide a TTL interface to a 5V environment. The
LVT162240 and LVTH162240 are fabricated with an
advanced BiCMOS technology to achieve high speed oper-
ation similar to 5V ABT while maintaining a low power dis-
sipation.
Features
a73 Input and output interface capability to systems at
5V V
CC
a73 Outputs include equivalent series resistance of 25Ω to
make external termination resistors unnecessary and
reduce overshoot and undershoot
a73 Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH162240),
also available without bushold feature (74LVT162240).
a73 Live insertion/extraction permitted
a73 Power Up/Down high impedance provides glitch-free
bus loading
a73 Functionally compatible with the 74 series 162240
a73 Latch-up performance exceeds 500 mA
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Pin Descriptions
Order Number Package Number Package Description
74LVT162240MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LVT162240MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74LVTH162240MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LVTH162240MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Inputs (Active LOW)
I
0
–I
15
Inputs
O
0
–O
15
3-STATE Outputs
June 1999
Revised June 1999
7
4
L
V
T1
62240
• 74L
VTH162240
Low
V
o
l
t
ag
e 16-
Bit
I
nver
ti
ng Buf
f
er
/Li
ne
D
r
ive
r
w
i
th
3-
S
T
A
T
E
O
u
t
put
s and
25
Ω
Ser
i
es
Resi
stor
s i
n
the
Output
s
74LVT162240 • 74LVTH162240
Low Voltage 16-Bit Inverting Buffer/Line Driver
with 3-STATE Outputs and
25Ω Series Resistors in the Outputs
General Description
The LVT162240 and LVTH162240 contain sixteen inverting
buffers with 3-STATE outputs designed to be employed as
a memory and address driver, clock driver, or bus oriented
transmitter/receiver. The device is nibble controlled. Indi-
vidual 3-STATE control inputs can be shorted together for
8-bit or 16-bit operation.
The LVT162240 and LVTH162240 are designed with
equivalent 25Ω series resistance in both the HIGH and
LOW states of the output. This design reduces line noise in
applications such as memory address drivers, clock driv-
ers, and bus transceivers/transmitters.
The LVTH162240 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These inverting buffers and line drivers are designed for
low-voltage (3.3V) V
CC
applications, but with the capability
to provide a TTL interface to a 5V environment. The
LVT162240 and LVTH162240 are fabricated with an
advanced BiCMOS technology to achieve high speed oper-
ation similar to 5V ABT while maintaining a low power dis-
sipation.
Features
a73 Input and output interface capability to systems at
5V V
CC
a73 Outputs include equivalent series resistance of 25Ω to
make external termination resistors unnecessary and
reduce overshoot and undershoot
a73 Bushold data inputs eliminate the need for external pull-
up resistors to hold unused inputs (74LVTH162240),
also available without bushold feature (74LVT162240).
a73 Live insertion/extraction permitted
a73 Power Up/Down high impedance provides glitch-free
bus loading
a73 Functionally compatible with the 74 series 162240
a73 Latch-up performance exceeds 500 mA
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Pin Descriptions
Order Number Package Number Package Description
74LVT162240MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LVT162240MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
74LVTH162240MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300” Wide
74LVTH162240MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Inputs (Active LOW)
I
0
–I
15
Inputs
O
0
–O
15
3-STATE Outputs