Philips Semiconductors Product specification
PowerMOS transistor BUK9120-48TC
Voltage clamped logic level FET
with temperature sensing diodes
GENERAL DESCRIPTION QUICK REFERENCE DATA
Protected N-channel enhancement SYMBOL PARAMETER MIN. TYP. MAX. UNIT
mode logic level field-effect power
transistor in a plastic envelope V
(CL)DSR
Drain-source clamp voltage 40 45 55 V
suitable for surface mounting. Using I
D
Drain current (DC) 52 A
’trench’ technology the device P
tot
Total power dissipation 116 W
features very low on-state resistance T
j
Junction temperature 175 ˚C
and has integral zener diodes giving R
DS(ON)
Drain-source on-state 20 mΩ
ESD protection up to 2kV and active resistance; V
GS
= 5 V
drain voltage clamping. Temperature V
F
Forward voltage,temperature 685 710 735 mV
sensitive diodes are incorporated for sense diodes
monitoring chip temperature. -S
F
Negative temperature 1.26 1.4 1.54 mV/K
The device is intended for use in coefficient, temperature sense
automotive and general purpose diodes
switching applications.
PINNING - SOT426 PIN CONFIGURATION SYMBOL
PIN DESCRIPTION
1 gate
2T1
3 (connected to mb)
4T2
5 source
Fig. 1. Fig. 2.
mb drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
Drain-source voltage continuous - 40 V
V
DG
Drain-gate voltage continuous - 38 V
±V
GS
Gate-source voltage - - 10 V
I
D
Drain current (DC) T
mb
= 25 ˚C - 52 A
I
D
Drain current (DC) T
mb
= 100 ˚C - 37 A
I
D
Drain current (DC) T
mb
= 140 ˚C - 25 A
I
DM
Drain current (pulse peak T
mb
= 25 ˚C - 208 A
value)
P
tot
Total power dissipation T
mb
= 25 ˚C - 116 W
I
GD
Drain-gate clamp current 5ms pulse; ∆ = 0.01 - 50 mA
I
GS
Gate-source clamp current 5ms pulse; ∆ = 0.01 - 50 mA
V
TS
Source T1/T2 voltage - - ±100 V
T
stg
Storage temperature - - 55 175 ˚C
T
j
Junction temperature - - 55 175 ˚C
d
g
s
T1
T2
mb
12 45
3
February 1998 1 Rev 1.100