Philips Semiconductors Product specification
TrenchMOS transistor BUK7506-30
Standard level FET
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT
standard level field-effect power
transistor in a plastic envelope using V
DS
Drain-source voltage 30 V
’trench’ technology. The device I
D
Drain current (DC) 75 A
features very low on-state resistance P
tot
Total power dissipation 188 W
and has integral zener diodes giving T
j
Junction temperature 175 ˚C
ESD protection up to 2kV. It is R
DS(ON)
Drain-source on-state 6 mΩ
intended for use in automotive and resistance V
GS
= 10 V
general purpose switching
applications.
PINNING - TO220AB PIN CONFIGURATION SYMBOL
PIN DESCRIPTION
1 gate
2 drain
3 source
tab drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
Drain-source voltage - - 30 V
V
DGR
Drain-gate voltage R
GS
= 20 kΩ -30
±V
GS
Gate-source voltage - - 16 V
I
D
Drain current (DC) T
mb
= 25 ˚C - 75 A
I
D
Drain current (DC) T
mb
= 100 ˚C - 53 A
I
DM
Drain current (pulse peak value) T
mb
= 25 ˚C - 240 A
P
tot
Total power dissipation T
mb
= 25 ˚C - 188 W
T
stg
, T
j
Storage & operating temperature - - 55 175 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction to - - 0.8 K/W
mounting base
R
th j-a
Thermal resistance junction to in free air 60 - K/W
ambient
ESD LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
C
Electrostatic discharge capacitor Human body model - 2 kV
voltage, all pins (100 pF, 1.5 kΩ)
d
g
s
123
tab
December 1997 1 Rev 1.100