Philips Semiconductors Product Specification
PowerMOS transistor BUK582-60A
Logic level FET
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT
logic level field-effect power
transistor in a plastic envelope V
DS
Drain-source voltage 60 V
suitable for surface mount I
D
Drain current (DC) 2.5 A
applications. P
tot
Total power dissipation 1.7 W
The device is intended for use in T
j
Junction temperature 150 ˚C
automotive and general purpose R
DS(ON)
Drain-source on-state 0.15 Ω
switching applications. resistance; V
GS
= 5 V
PINNING - SOT223 PIN CONFIGURATION SYMBOL
PIN DESCRIPTION
1 gate
2 drain
3 source
4 drain (tab)
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
Drain-source voltage - - 60 V
V
DGR
Drain-gate voltage R
GS
= 20 kΩ -60
±
GS
Gate-source voltage - - 15 V
I
D
Drain current (DC) T
amb
= 25 ˚C - 2.5 A
I
D
Drain current (DC) T
amb
= 100 ˚C - 1.5 A
I
DM
Drain current (pulse peak value) T
amb
= 25 ˚C - 10 A
P
tot
Total power dissipation T
amb
= 25 ˚C - 1.7 W
T
stg
Storage temperature - - 55 150 ˚C
T
j
Junction Temperature - - 150 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-b
From junction to board
1
Mounted on any PCB e.g. Fig.18 - 40 - K/W
R
th j-amb
From junction to ambient Mounted on PCB of Fig.18 - - 75 K/W
4
1 23
d
g
s
1 Temperature measured 1-3 mm from tab.
April 1993 1 Rev 1.000