Philips Semiconductors Product Specification
PowerMOS transistor BUK545-60A/B
Logic level FET
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. MAX. UNIT
logic level field-effect power
transistor in a plastic full-pack BUK545 -60A -60B
envelope. V
DS
Drain-source voltage 60 60 V
The device is intended for use in I
D
Drain current (DC) 20 18 A
Switched Mode Power Supplies P
tot
Total power dissipation 30 30 W
(SMPS), motor control, welding, T
j
Junction temperature 150 150 ˚C
DC/DC and AC/DC converters, and R
DS(ON)
Drain-source on-state 0.042 0.055 Ω
in automotive and general purpose resistance; V
GS
= 5 V
switching applications.
PINNING - SOT186 PIN CONFIGURATION SYMBOL
PIN DESCRIPTION
1 gate
2 drain
3 source
case isolated
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
Drain-source voltage - - 60 V
V
DGR
Drain-gate voltage R
GS
= 20 kΩ -60
±
GS
Gate-source voltage - - 15 V
±V
GSM
Non-repetitive gate-source voltage t
p
≤ 50 µs - 20 V
-60A -60B
I
D
Drain current (DC) T
hs
= 25 ˚C - 20 18 A
I
D
Drain current (DC) T
hs
= 100 ˚C - 13 11 A
I
DM
Drain current (pulse peak value) T
hs
= 25 ˚C - 80 72 A
P
tot
Total power dissipation T
hs
= 25 ˚C - 30 W
T
stg
Storage temperature - - 55 150 ˚C
T
j
Junction Temperature - - 150 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-hs
Thermal resistance junction to with heatsink compound - - 4.17 K/W
heatsink
R
th j-a
Thermal resistance junction to - 55 - K/W
ambient
123
case
d
g
s
April 1993 1 Rev 1.100