Philips Semiconductors Product specification
N-channel enhancement mode BSH105
MOS transistor
FEATURES SYMBOL QUICK REFERENCE DATA
• Very low threshold voltage V
DS
= 20 V
• Fast switching
• Logic level compatible I
D
= 1.05 A
• Subminiature surface mount
package R
DS(ON)
≤ 250 mΩ (V
GS
= 2.5 V)
V
GS(TO)
≥ 0.4 V
GENERAL DESCRIPTION PINNING SOT23
N-channel, enhancement mode, PIN DESCRIPTION
logic level, field-effect power
transistor. This device has very low 1 gate
threshold voltage and extremely
fast switching making it ideal for 2 source
battery powered applications and
high speed digital interfacing. 3 drain
The BSH105 is supplied in the
SOT23 subminiature surface
mounting package.
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DS
Drain-source voltage - 20 V
V
DGR
Drain-gate voltage R
GS
= 20 kΩ -2
V
GS
Gate-source voltage - ± 8V
I
D
Drain current (DC) T
a
= 25 ˚C - 1.05 A
T
a
= 100 ˚C - 0.67 A
I
DM
Drain current (pulse peak value) T
a
= 25 ˚C - 4.2 A
P
tot
Total power dissipation T
a
= 25 ˚C - 0.417 W
T
a
= 100 ˚C - 0.17 W
T
stg
, T
j
Storage & operating temperature - 55 150 ˚C
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT
R
th j-a
Thermal resistance junction to FR4 board, minimum 300 - K/W
ambient footprint
d
g
s
1 2
3
Top view
August 1998 1 Rev 1.000