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BS62LV256

器件描述:Very Low Power/Voltage CMOS SRAM 32K X 8 bit
器件厂商:BSI [Brilliance Semiconductor]
文件大小:331.19KB,共11页
Sponsor by e络盟
器件资料摘要:
Revision 2.2
April 2001
1
A6
BSI
Very Low Power/Voltage CMOS SRAM
32K X 8 bit
POWER DISSIPATION
SPEED
(ns)
STANDBY
(ICCSB1, Max)
Operating
(ICC, Max)
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
Vcc=
3.0V
Vcc=
5.0V
Vcc=
3.0V
Vcc=
5.0V
Vcc=
3.0V
PKG
TYPE
BS62LV256SC SOP-28
BS62LV256TC TSOP-28
BS62LV256PC PDIP-28
BS62LV256JC SOJ-28
BS62LV256DC
0
O
C to +70
O
C 2.4V ~ 5.5V 70 1uA 0.2uA 35mA 20mA
DICE
BS62LV256SI SOP-28
BS62LV256TI TSOP-28
BS62LV256PI PDIP-28
BS62LV256JI SOJ-28
BS62LV256DI
-40
O
C to +85
O
C 2.4V ~ 5.5V 70 2uA 0.4uA 40mA 25mA
DICE
• Wide Vcc operation voltage : 2.4V ~ 5.5V
• Very low power consumption :
Vcc = 3.0V C-grade : 20mA (Max.) operating current
I- grade : 25mA (Max.) operating current
0.01uA (Typ.) CMOS standby current
Vcc = 5.0V C-grade : 35mA (Max.) operating current
I- grade : 40mA (Max.) operating current
0.4uA (Typ.) CMOS standby current
• High speed access time :
-70 70ns (Max.) at Vcc=3.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
The BS62LV256 is a high performance, very low power CMOS
Static Random Access Memory organized as 32,768 words by 8 bits
and operates from a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.01uA and maximum access time of 70ns in 3V operation.
Easy memory expansion is provided by active LOW chip
enable (CE), active LOW output enable (OE) and three-state
output drivers.
The BS62LV256 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV256 is available in the DICE form, JEDEC standard
28pin 330mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP and
8mmx13.4mm TSOP (normal type).
„ DESCRIPTION
„ FEATURES
„ BLOCK DIAGRAM
„ PRODUCT FAMILY
„ PIN CONFIGURATIONS
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
Address
Input
Buffer
Row
Decoder
Memory Array
512 x 512
Column I/O
Sense Amp
Write Driver
Column Decoder
Data
Buffer
Output
Address Input Buffer
A3 A2 A1 A0 A10
Data
Buffer
Input
Control
Gnd
Vdd
OE
WE
CE
DQ5
DQ4
A12
A8
A7
8
8
8
8
DQ7
DQ6
DQ3
DQ2
DQ1
DQ0
A11
A9
A5
12
64
512
512
18
A14
A13
A4
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
BS62LV256
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
VC
WE
A13
A8
A9
A11
OE
A10
CE
DQ7
DQ6
DQ5
DQ4
DQ3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
C


R0201-BS62LV256
BS62LV256TC
BS62LV256TI
BS62LV256SC
BS62LV256SI
BS62LV256PC
BS62LV256PI
BS62LV256JC
BS62LV256JI