R0201-BS62LV1027 Revision 2.1
Jan. 2004
1
POWER DISSIPATION
SPEED
(ns)
STANDBY
(ICCSB1, Max)
(ICC, Max)
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
PKG TYPE
BS62LV1027SC SOP-32
BS62LV1027TC TSOP-32
BS62LV1027STC STSOP-32
BS62LV1027PC PDIP-32
BS62LV1027JC SOJ-32
BS62LV1027DC
+0
O
C to +70
O
C 2.4V ~ 5.5V 55/70 8.0uA 14mA
DICE
BS62LV1027SI SOP-32
BS62LV1027TI TSOP-32
BS62LV1027STI STSOP-32
BS62LV1027PI PDIP-32
BS62LV1027JI SOJ-32
BS62LV1027DI
-40
O
C to +85
O
C2.4V ~ 5.5V 55/70 20uA 15mA
DICE
Very Low Power/Voltage CMOS SRAM
128K X 8 bit
• Wide Vcc operation voltage : 2.4V ~ 5.5V
• Very low power consumption :
Vcc = 3.0V C-grade : 17mA (@55ns) operating current
I- grade : 18mA (@55ns) operating current
C-grade : 14mA (@70ns) operating current
I- grade : 15mA (@70ns) operating current
0.1uA (Typ.) CMOS standby current
Vcc = 5.0V C-grade : 46mA (55ns) operating current
I- grade : 47mA (55ns) operating current
C-grade : 38mA (70ns) operating current
I- grade : 39mA (70ns) operating current
0.6uA (Typ.) CMOS standby current
• High speed access time :
-55 55ns
-70 70ns
• Automatic power down when chip is deselected
The BS62LV1027 is a high performance, very low power CMOS
Static Random Access Memory organized as 131,072 words by 8 bits
and operates from a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.1uA at 3V/25
o
C and maximum access time of 55ns at 3V/85
o
C.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The BS62LV1027 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV1027 is available in DICE form , JEDEC standard 32 pin
450mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP,8mm x13.4
mm STSOP and 8mmx20mm TSOP.
„ DESCRIPTION
„ FEATURES
„ BLOCK DIAGRAM
„ PRODUCT FAMILY
„ PIN CONFIGURATIONS
Brilliance Semiconductor, Inc. reserves the right to modify document contents without notice.
BS62LV1027
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
•
BS62LV1027SC
BS62LV1027SI
BS62LV1027PC
BS62LV1027PI
BS62LV1027JC
BS62LV1027JI
A7
Address
Input
Buffer
Row
Decoder
Memory Array
1024 x 1024
Column I/O
Write Driver
Sense Amp
Column Decoder
Data
Buffer
Output
Address Input Buffer
A3 A2 A1 A0 A10
Data
Buffer
Input
Control
Gnd
Vdd
OE
WE
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
A14
A9
A11
A8
A13
A12
A6
8
8
8
8
14
128
1024
1024
20
A16
A15
A4A5
CE2
BSI
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
•
BS62LV1027TC
BS62LV1027STC
BS62LV1027TI
BS62LV1027STI
• Easy expansion with CE2, CE1, and OE options
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
Vcc=5.0V Vcc=3.0V
70ns
1.3uA
2.5uA
38mA
39mA
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
55ns : 3.0~5.5V
70ns : 2.7~5.5V
Operating
70ns
Vcc=3V Vcc=5V