BS62LV1025DC
器件描述:Very Low Power/Voltage CMOS SRAM 128K X 8 bit
文件大小:382.22KB,共11页
Sponsor by e络盟
器件资料摘要:
R0201-BS62LV1025 Revision 2.2
April 2001
1
Very Low Power/Voltage CMOS SRAM
128K X 8 bit
• Vcc operation voltage : 4.5V ~ 5.5V
• Very low power consumption :
Vcc = 5.0V C-grade : 35mA (Max.) operating current
I- grade : 40mA (Max.) operating current
0.4uA (Typ.) CMOS standby current
• High speed access time :
-55 55ns (Max.) at Vcc = 5.0V
-70 70ns (Max.) at Vcc = 5.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2, CE1, and OE options
The BS62LV1025 is a high performance, very low power CMOS
Static Random Access Memory organized as 131,072 words by 8 bits
and operates from a wide range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.4uA and maximum access time of 55ns in 5V operation.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The BS62LV1025 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV1025 is available in DICE form, JEDEC standard 32 pin
450mil Plastic SOP, 300mil Plastic SOJ, 600mil Plastic DIP,
8mmx13.4mm STSOP and 8mmx20mm TSOP.