Revision 2.2
April 2001
1
Ultra Low Power/Voltage CMOS SRAM
512K x 16 or 1M x 8 bit switchable
The BS616UV8021 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 524,288 words by 16 bits or
1,048,576 bytes by 8 bits selectable by CIO pin and operates from a wide
range of 1.8V to 2.3V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 0.6uA and maximum access time of 70/100ns in 2.0V operation.
Easy memory expansion is provided by an active HIGH chip
enable2(CE2), active LOW chip enable1(CE1), active LOW output
enable(OE) and three-state output drivers.
The BS616UV8021 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616UV8021 is available in DICE form and 48-pin BGA type.
POWER DISSIPATION
SPEED
(ns)
STANDBY
(ICCSB1, Max)
Operating
(ICC, Max)
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc RANGE
Vcc=2.0V Vcc=2.0V Vcc=2.0V
PKG TYPE
BS616UV8021DC DICE
BS616UV8021BC BGA-48-0810
BS616UV8021FC
+0
O
C to +70
O
C 1.8V ~ 2.3V 70 / 100 15uA 20mA
BGA-48-0912
BS616UV8021DI DICE
BS616UV8021BI BGA-48-0810
BS616UV8021FI
-40
O
C to +85
O
C 1.8V ~ 2.3V 70 / 100 20uA 25mA
BGA-48-0912
• Ultra low operation voltage : 1.8 ~ 2.3V
• Ultra low power consumption :
Vcc = 2.0V C-grade: 20mA (Max.) operating current
I-grade : 25mA (Max.) operating current
0.6uA (Typ.) CMOS standby current
• High speed access time :
-70 70ns (Max.) at Vcc=2.0V
-10 100ns (Max.) at Vcc=2.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE1, CE2 and OE options
• I/O Configuration x8/x16 selectable by CIO, LB and UB pin
„ DESCRIPTION„ FEATURES
„ BLOCK DIAGRAM
„ PRODUCT FAMILY
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
BS616UV8021
Row
Decoder
Memory Array
2048 x 4096
Column I/O
Write Driver
Sense Amp
Column Decoder
Data
Buffer
Output
A1 A2 A3
Data
Buffer
Input
Control
Vss
Vdd
OE
WE
CE1
D15
D0
A11
A7
A17
A8
A12
A13
16(8)
16(8)
16(8)
16(8)
16(18)
256(512)
4096
204822
A10
A9
A0
A6
A4A16
A14
Address
Input
Buffer
A5
Address Input Buffer
.
.
.
.
UB
.
.
.
.
LB
A15
CIO
CE2
(SAE)A18
„ PIN CONFIGURATIONS
R0201-BS616UV8021
LB OE A0 A1 A2
CE2
D8 UB A3 A4 CE1 D0
D9 D10 A5 A6 D1 D2
VSS D11 A17 A7 D3 VCC
VCC
D12 A16 D4
VSS
D14
A15D13 A14 D5 D6
D15 CIO.
A12 A13
WE D7
A18 A8 A9 A10 A11 SAE.
A
B
C
D
E
F
G
H
123456
Vss
48-Ball CSP top View
BSI