Revision 2.2
April 2001
1
BSI
Ultra Low Power/Voltage CMOS SRAM
1M x 16 or 2M x 8 bit switchable
The BS616UV1620 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 1,048,676 words by 16 bits or
2,097,152 bytes by 8 bits selectable by CIO pin and operates in a wide
range of 1.8V to 2.3V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 1.2uA and maximum access time of 70/100ns in 2.0V operation.
This device provide three control inputs and three states output drivers
for easy memory expansion.
The BS616UV1620 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616UV1620 is available in DICE form and 48-pin BGA type.
POWER DISSIPATION
SPEED
(ns)
STANDBY
(ICCSB1, Max)
Operating
(ICC, Max)
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc RANGE
Vcc=2.0V Vcc=2.0V Vcc=2.0V
PKG TYPE
BS616UV1620BC BGA-48-0810
BS616UV1620FC
+0
O
C to +70
O
C 1.8V ~ 2.3V 70 / 100 30uA 25mA
BGA-48-0912
BS616UV1620BI BGA-48-0810
BS616UV1620FI
-40
O
C to +85
O
C 1.8V ~ 2.3V 70 / 100 40uA 30mA
BGA-48-0912
• Ultra low operation voltage : 1.8 ~ 2.3V
• Ultra low power consumption :
Vcc = 1.8V C-grade : 25mA (Max.) operating current
I- grade : 30mA (Max.) operating current
1.2uA (Typ.) CMOS standby current
• High speed access time :
-70 70ns (Max.) at Vcc = 2.0V
-10 100ns (Max.) at Vcc = 2.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE1, CE2 and OE options
• I/O Configuration x8/x16 selectable by CIO, LB and UB pin
„ DESCRIPTION„ FEATURES
„ BLOCK DIAGRAM
„ PRODUCT FAMILY
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
„ PIN CONFIGURATIONS
R0201-BS616UV1620
LB OE
A0 A1 A2 CE2
D8 UB A3 A4 CE1 D0
D9 D10 A5 A6 D1 D2
VSS D11 A17 A7 D3 VCC
VCC D12 A16 D4 VSS
D14 D13 A 14 A15 D5 D6
D15 CIO.A12A13
WE
D7
A18 A8 A9 A10 A11 SAE.
A
B
C
D
E
F
G
H
123456
A19
Row
Decoder
Memory Array
4096 x 4096
Column I/O
Write Driver
Sense Amp
Column Decoder
Data
Buffer
Output
A1 A2 A3
Data
Input
Buffer
Control
Vss
Vdd
OE
WE
D0
A8
A12
16(8)
16(8)
16(8)
16(8)
CE1
D15
A11
A7
A17
A13
16(18)
256(512)
4096
409624
A10
A9
A0
A6
A4A16
A14
Address
Input
Buffer
A18
Address Input Buffer
.
.
.
.
UB
.
.
.
.
LB
A15
CIO
CE2
(SAE)A5
A19
BS616UV1620
48-Ball CSP top View