Revision 2.4
April 2002
1
A4
A3
A2
A1
A0
CE
DQ0
DQ1
DQ2
DQ3
VCC
GND
DQ4
DQ5
DQ6
DQ7
WE
A17
A16
A15
A14
A13
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
GND
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
A12
1
2
3
4
5
7
14
16
18
20
22
43
38
31
29
27
25
23
6
8
9
10
11
12
36
35
34
33
BS616LV4011EC
BS616LV4011EI
13
15
17
19
21
44
42
41
40
39
37
32
30
28
26
24
R0201-BS616LV4011
Very Low Power/Voltage CMOS SRAM
256K X 16 bit
• Very low operation voltage : 2.4 ~ 5.5V
• Very low power consumption :
Vcc = 3.0V C-grade: 20mA (Max.) operating current
I-grade: 25mA (Max.) operating current
0.25uA (Typ.) CMOS standby current
Vcc = 5.0V C-grade: 45mA (Max.) operating current
I-grade: 50mA (Max.) operating current
1.5uA (Typ.) CMOS standby current
• High speed access time :
-70 70ns (Max.) at Vcc = 3.0V
-10 100ns (Max.) at Vcc = 3.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
The BS616LV4011 is a high performance, very low power CMOS Static
Random Access Memory organized as 262,144 words by 16 bits and
operates from a wide range of 2.4V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current
of 0.25uA and maximum access time of 70/100ns in 3V operation.
Easy memory expansion is provided by active LOW chip
enable(CE), active LOW output enable(OE) and three-state output
drivers.
The BS616LV4011 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616LV4011 is available in DICE form, JEDEC standard 44-pin
TSOP Type II package and 48-pin BGA package.
„ DESCRIPTION
„ FEATURES
Row
Decoder
Memory Array
2048 x 2048
Column I/O
Write Driver
Sense Amp
Column Decoder
Data
Buffer
Output
A9 A8 A7
Data
Input
Buffer
Control
Gnd
Vcc
OE
DQ0
A15
A1
16
16
16
16
WE
CE
DQ15
A0
A13
A14
A2
14
128
2048
„ BLOCK DIAGRAM
204822
A17
A16
A10
A12
A6A11
A3
Address
Input
Buffer
A5
Address Input Buffer
.
.
.
.
UB
.
.
.
.
LB
„ PRODUCT FAMILY
„ PIN CONFIGURATIONS
Brilliance Semiconductor Inc. reserves the right to modify document contents without notice.
BS616LV4011
A4
BSI
POWER DISSIPATION
SPEED
( ns )
STANDBY
( ICCSB1, Max )
Operating
( ICC, Max )
PRODUCT
FAMILY
OPERATING
TEMPERATURE
Vcc
RANGE
Vcc=
3.0V
Vcc=
3.0V
Vcc=
5.0V
Vcc=
3.0V
Vcc=
5.0V
PKG TYPE
BS616LV4011DC DICE
BS616LV4011EC TSOP2-44
BS616LV4011BC BGA-48-0810
BS616LV4011AC
+0
O
C to +70
O
C 2.4V ~ 5.5V 70/100
45mA
BGA-48-0608
1.5uA 15uA 20mA
BS616LV4011DI DICE
BS616LV4011EI TSOP2-44
BS616LV4011BI BGA-48-0810
BS616LV4011AI
-40
O
C to +85
O
C 2.4V ~ 5.5V 70/100
50mA3uA 50uA 25mA
BGA-48-0608