BS616LV2015
器件描述:Very Low Power/Voltage CMOS SRAM 128K X 16 bit
文件大小:233.43KB,共11页
Sponsor by e络盟
器件资料摘要:
R0201-BS616LV2015 Revision 2.5
April 2002
1
Very Low Power/Voltage CMOS SRAM
128K X 16 bit
• Very low operation voltage : 4.5 ~ 5.5V
• Very low power consumption :
Vcc = 5.0V C-grade: 40mA (Max.) operating current
I -grade: 45mA (Max.) operating current
0.6uA (Typ.) CMOS standby current
• High speed access time :
-70 70ns (Max.) at Vcc = 5.0V
-55 55ns (Max.) at Vcc = 5.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE and OE options
• I/O Configuration x8/x16 selectable by LB and UB pin
The BS616LV2015 is a
Random Acce
operates from a
Advanced CM
speed and low
of 0.6uA and m
Easy memory
enable(CE), act
drivers.
The BS616LV2015 ha
power consum
The BS616LV2015 is
TSOP Type II
and 48-pin BG
high performance, very low power CMOS Static
ss Memory organized as 131,072 words by 16 bits and
wide range of 4.5V to 5.5V supply voltage.
OS technology and circuit techniques provide both high
power features with a typical CMOS standby current
aximum access time of 70/55ns in 5V operation.
expansion is provided by an active LOW chip
ive LOW output enable(OE) and three-state output
s an automatic power down feature, reducing the
ption significantly when chip is deselected.
available in DICE form, JEDEC standard 44-pin
package, JEDEC standard 44-pin TSOP Type II package
A package.