AT-32063-BLK
器件描述:Low Current, High Performance NPN Silicon Bipolar Transistor
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器件资料摘要:
4-63
Low Current, High Performance
NPN Silicon Bipolar Transistor
Technical Data
Features
• High Performance Bipolar
Transistor Optimized for
Low Current, Low Voltage
Operation
• 900 MHz Performance:
1.1␣ dB NF, 14.5␣ dB G
A
• Characterized for End-of-
Life Battery Use (2.7 V)
• SOT-363 (SC-70) Plastic
Package
• Tape-and-Reel Packaging
Option Available
[1]
AT-32063
Description
The AT-32063 contains two high
performance NPN bipolar transis-
tors in a single SOT-363 package.
The devices are unconnected,
allowing flexibility in design. The
pin-out is convenient for cascode
amplifier designs. The SOT-363
package is an industry standard
plastic surface mount package.
The 3.2 micron emitter-to-emitter
pitch and reduced parasitic design
of the transistor yields extremely
high performance products that
can perform a multiplicity of
tasks. The 20 emitter finger
interdigitated geometry yields a
transistor that is easy to match to
and extremely fast, with moderate
power, low noise resistance, and
low operating currents.
Optimized performance at 2.7 V
makes this device ideal for use in
900 MHz, 1.8 GHz, and 2.4 GHz
battery operated systems as an
Surface Mount Package
SOT-363 (SC-70)
Pin Connections and
Package Marking
B
1
1
E
1
2
C
2
3
C
1
6
E
2
5
B
2
4
LNA, gain stage, buffer, oscillator,
or active mixer. Typical amplifier
designs at 900 MHz yield 1.3 dB
noise figures with 12 dB or more
associated gain at a 2.7 V, 5 mA
bias, with noise performance
being relatively insensitive to
input match. High gain capability
at 1 V, 1 mA makes this device a
good fit for 900 MHz pager appli-
cations. Voltage breakdowns are
high enough for use at 5 volts.
The AT-3 series bipolar transistors
are fabricated using an optimized
version of Hewlett-Packard’s
10␣ GHz f
t
, 30 GHz f
max
Self-
Aligned-Transistor (SAT) process.
The die are nitride passivated for
surface protection. Excellent
device uniformity, performance
and reliability are produced by the
use of ion-implantation, self-
alignment techniques, and gold
metallization in the fabrication of
these devices.
I I
5965-8921E