Features
a174 Data retention in the absence of
power
a174 Automatic write-protection
during power-up/power-down
cycles
a174 Industry-standard 32-pin 256K x
8 pinout
a174 Conventional SRAM operation;
unlimited write cycles
a174 10-year minimum data retention
in absence of power
a174 Battery internally isolated until
power is applied
Pin Connections
General Description
The CMOS bq4014 is a nonvolatile
2,097,152-bit static RAM organized as
262,144 words by 8 bits. The integral
control circuitry and lithium energy
source provide reliable nonvolatility
coupled with the unlimited write
cycles of standard SRAM.
The control circuitry constantly
monitors the single 5V supply for an
out-of-tolerance condition. When
VCC falls out of tolerance, the SRAM
is unconditionally write-protected to
prevent inadvertent write operation.
At this time the integral energy
source is switched on to sustain the
memory until after VCC returns
valid.
The bq4014 uses extremely low
standby current CMOS SRAMs,
coupled with small lithium coin
cells to provide nonvolatility without
long write-cycle times and the write-
cycle limitations associated with
EEPROM.
The bq4014 requires no external cir-
cuitry and is compatible with the
industry-standard 2Mb SRAM
pinout.
Pin Names
A0–A17 Address inputs
DQ0–DQ7 Data input/output
CE Chip enable input
OE Output enable input
WE Write enable input
NC No connect
VCC +5 volt supply input
VSS Ground
256Kx8 Nonvolatile SRAM
bq4014/bq4014Y
Sept. 1992
Block Diagram
Selection Guide
Part
Number
Maximum
Access
Time (ns)
Negative
Supply
Tolerance
Part
Number
Maximum
Access
Time (ns)
Negative
Supply
Tolerance
bq4014 -85 85 -5% bq4014Y -85 85 -10%
bq4014 -120 120 -5% bq4014Y -120 120 -10%
1