TL/F/6413
54LS245/DM54LS245/DM74LS245
TRI-STATE
Octal
Bus
Transceiver
June 1989
54LS245/DM54LS245/DM74LS245
TRI-STATE Octal Bus Transceiver
General Description
These octal bus transceivers are designed for asynchro-
nous two-way communication between data buses. The
control function implementation minimizes external timing
requirements.
The device allows data transmission from the A bus to the B
bus or from the B bus to the A bus depending upon the logic
level at the direction control (DIR) input. The enable input
(G) can be used to disable the device so that the buses are
effectively isolated.
Features
Y
Bi-Directional bus transceiver in a high-density 20-pin
package
Y
TRI-STATE outputs drive bus lines directly
Y
PNP inputs reduce DC loading on bus lines
Y
Hysteresis at bus inputs improve noise margins
Y
Typical propagation delay times, port-to-port 8 ns
Y
Typical enable/disable times 17 ns
Y
I
OL
(sink current)
54LS 12 mA
74LS 24 mA
Y
I
OH
(source current)
54LS b12 mA
74LS b15 mA
Y
Alternate Military/Aerospace device (54LS245) is avail-
able. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6413–1
Order Number 54LS245DMQB, 54LS245FMQB, 54LS245LMQB,
DM54LS245J, DM54LS245W, DM74LS245WM or DM74LS245N
See NS Package Number E20A, J20A, M20B, N20A or W20A
Function Table
Enable
Direction
Operation
G
Control
DIR
L L B data to A bus
L H A data to B bus
H X Isolation
H e High Level, L e Low Level, X e Irrelevant
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.