Digital Attenuator, 50 dB, 6-Bit,
TTL Driver, DC - 2.0 GHz
AT65
-0106

SOW-24
V 6.00
Electrical Specifications: TA = 25°C
Features
n Attenuation: 1 dB Steps to 50 dB
n Low DC Power Consumption
n Plastic SOIC, Wide Body, SMT Package
n Integral TTL Driver
n 50 ohm Impedance
n Test Boards are Available
n Tape and Reel Packaging Available

Description
M/A-COM's AT65-0106 is a GaAs FET 6-bit digital
attenuator with a 1 dB minimum step size and a 50 dB total
attenuation range. This device is in a SOIC-24, wide body
plastic surface mount package. The AT65-0106 is ideally
suited for use where accuracy, fast speed, very low power
consumption and low costs are required.
Package outline conforms to JEDEC standard MS-013AD.
Parameter Test Conditions Frequency Units Min Typ Max
Insertion Loss — DC - 2.0 GHz dB — 4.2 4.7
Attenuation
Accuracy
Individual Bits 1-2-4-8-16-32 dB
Any Combination of Bits 3 to 15 dB
Any Combination of Bits 17 to 31 dB
Any Combination of Bits 32 to 50 dB
DC - 2.0 GHz
DC - 2.0 GHz
DC - 2.0 GHz
DC - 2.0 GHz
dB
dB
dB
dB
—
—
—
—
—
—
—
—
±(.3 +3% of atten setting)
±(.5 +5% of atten setting)
±(.3 +3% of atten setting)
±(.5 +7% of atten setting)
VSWR Full Range DC - 2.0 GHz Ratio — 1.8:1 2:1
Switching Speed 1 50% Cntl to 90%/10% RF
10% to 90% or 90% to 10%
—
—
nS
nS
—
—
75
20
150
50
1 dB Compression —
—
50 MHz
0.5 - 2.0 GHz
dBm
dBm
—
—
+21
+29
—
—
Input IP3 Two-tone inputs up to +5 dBm
@ 0 dB Attenuation
50 MHz
0.5-2.0 GHz
dB
dB
—
—
+35
+48
—
—
Vcc
-Vee
—
—
—
—
V
V
4.75
-8.0
5.0
-5.0
5.25
-4.75
Logic “0” Sink Current is 20 µA max. — V 0.0 — 0.8
Logic “1” Sink Current is 20 µA max. — V 2.0 — 5.0
Icc Vcc min to max, Logic “0” or “1” — mA — 0.2 6
-Iee -Vee min to max, Logic “0” or “1” — mA — -0.2 -1
1. Decoupling capacitors (.01µF) are required on power supply lines.