November 2003 AS80M2516A

rev 1.0

Alliance Semiconductor
2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.

Features

• Two on chip PLLs.
• Generates an EMI optimized clocking signal
at output.
• Non Spread spectrum mode available
• Input Frequency Range 2MHz– 200Mhz in
Non Spread mode
• Input Frequency Range 6Mhz – 80Mhz in
Spread mode.
• Output Frequency Range 4Mhz – 140Mhz.
• Four frequency outputs; two per PLL.
• Programmable spread range and type of
modulation ( center or down) and type of
profile.
• Power down feature is incorporated.
• Both the PLL have reference frequency
output.
• Supply voltage range 3.3 V (± 0.3)
• Software is available for configuring all the
parameters of the Chip, through I2C .


Pin Configuration

















Product Description

The AS80M2516A is dual phase lock loop clock
chip. The AS80M2516A is a versatile spread
spectrum frequency modulator design specifically
for a wide range of clock frequencies.
The AS80M2516A reduces electromagnetic
interference (EMI) at clock source. The
AS80M2516A allows significant system cost
savings by reducing the number of circuit board
layers and shielding that are required to pass EMI
regulations.
The AS80M2516A is I2C configurable. All the
functional parameters of the AS80M2516A can be
configured from external I2C master unit through
I2C bus.

The AS80M2516A modulates the output of PLL in
order to spread the bandwidth of a
synthesized clock , there by decreasing the peak
amplitudes of its harmonics. This results in
significantly lower system EMI compared to the
typical narrow band signal produced by oscillator
and most clock generators. Lowering EMI by
increasing a signal's bandwidth is called spread
spectrum clock generation.

VDDA/DIGITAL
1
2
3
5
6
7
8
4
16
15
14
12
11
10
9
13
X1IN
X1OUT
VDD_FOUT2
VDD_FOUT1
FOUT1_CLK1
FOUT2_CLK1
PLL1_REF_D2
REF1OUT
GND
SCL
SDA
FOUT1_CLK2
FOUT2_CLK2
REF2OUT
POWER DOWN