AS7C3513
器件描述:5V/3.3V 32K x 6 CMOS SRAM
文件大小:187.3KB,共8页
Sponsor by e络盟
器件资料摘要:
August 2000
AS7C513
AS7C3513
5V/3.3V 32K×16 CMOS SRAM
• AS7C513 (5V version)
• AS7C3513 (3.3V version)
• Industrial and commercial temperature
• Organization: 32,768 words × 16 bits
• Center power and ground pins
•High speed
- 12/15/20 ns address access time
- 5/7/9 ns output enable access time
• Low power consumption: ACTIVE
- 800 mW (AS7C513) / max @ 12 ns
- 432 mW (AS7C3513) / max @ 12 ns
• Low power consumption: STANDBY
- 28 mW (AS7C513) / max CMOS
- 18 mW (AS7C3513) / max CMOS
• 2.0V data retention
• Easy memory expansion with CE, OE inputs
• TTL-compatible, three-state I/O
• 44-pin JEDEC standard package
- 400 mil SOJ
- 400 mil TSOP II
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA
32K × 16
Array
OE
CE
WE
Column decoder
Ro
w
decoder
A0
A1
A2
A3
A4
A5
A7
V
CC
GND
A8 A9
A1
0
A1
1
A1
2
A1
3
A1
4
Control circuit
I/O0–I/O7
I/O8–I/O15
UB
LB
I/O
buffer
A6
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
I/O13
I/O12
GND
V
CC
I/O11
I/O10
I/O9
I/O8
NC
A7
A8
A9
A10
NC
A0
CE
I/O0
I/O1
I/O2
I/O3
V
CC
GND
I/O4
I/O5
I/O6
I/O7
WE
A14
A13
A12
44-Pin SOJ, TSOP II (400 mil)
21
22
A11
NC
UB
LB
I/O15
I/O14
2A3
3A2
4A1
1NC
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
43
42
41
44
A5
A6
OE
A4
AS
7
C
5
1
3
A
S
7
C
35
13
Shaded areas indicate advance information.
AS7C513-12
AS7C3513-12
AS7C513-15
AS7C3513-15
AS7C513-20
AS7C3513-20 Unit
Maximum address access time 12 15 20 ns
Maximum output enable access time 5 7 9 ns
Maximum operating current
AS7C513 160 150 140 mA
AS7C3513 120 110 100 mA
Maximum CMOS standby current
AS7C513 5 5 5 mA
AS7C3513 5 5 5 mA