TL/F/6540
54125/DM54125/DM74125
Quad
TRI-STATE
Buffers
June 1989
54125/DM54125/DM74125
Quad TRI-STATE Buffers
General Description
This device contains four independent gates each of which
performs a non-inverting buffer function. The outputs have
the TRI-STATE feature. When enabled, the outputs exhibit
the low impedance characteristics of a standard TTL output
with additional drive capability at the high Logic level to per-
mit the driving of bus lines without external pull-up resistors.
When disabled, both the output transistors are turned off
presenting a high-impedance state to the bus line. Thus the
output will act neither as a significant load nor as a driver.
To minimize the possibility that two outputs will attempt to
take a common bus to opposite logic levels, the disable time
is shorter than the enable time of the outputs.
Features
Y
Alternate Military/Aerospace device (54125) is avail-
able. Contact a National Semiconductor Sales Office/
Distributor for specifications.
Connection Diagram
Dual-In-Line Package
TL/F/6540–1
Order Number 54125DMQB, 54125FMQB, DM54125J, DM54125W or DM74125N
See NS Package Number J14A, N14A or W14B
Function Table
Y e A
Inputs Output
AC Y
LL L
HL H
X H Hi-Z
H e High Logic Level
L e Low Logic Level
X e Either Low or High Logic Level
Hi-Z e TRI-STATE (Outputs are disabled)
TRI-STATE is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.