AS7C1026
器件描述：5V/3.3V 64Kx6 CMOS SRAM
器件厂商：ALSC [Alliance Semiconductor Corporation]
厂商主页：http://www.alsc.com/
文件大小：239.37KB，共10页
Sponsor by e络盟器件资料摘要：
May 2000
Copyright ©1999 Alliance Semiconductor. All rights reserved.
®
AS7C1026
AS7C31026
DID 11-20011-A. 5/22/00 ALLIANCE SEMICONDUCTOR 1
5V/3.3V 64K×16 CMOS SRAM
Features
• AS7C1026 (5V version)
• AS7C31026 (3.3V version)
• Industrial and commercial versions
• Organization: 65,536 words x 16 bits
• Center power and ground pins for low noise
•High speed
- 10/12/15/20 ns address access time
- 5/6/8/10 ns output enable access time
• Low power consumption: ACTIVE
- 880 mW (AS7C1026) / max @ 12 ns
- 396 mW (AS7C31026) / max @ 12 ns
• Low power consumption: STANDBY
- 28 mW (AS7C1026) / max CMOS I/O
- 18 mW (AS7C31026) / max CMOS I/O
• 2.0V data retention
• Easy memory expansion with CE, OE inputs
• TTL-compatible, three-state I/O
• JEDEC standard packaging
- 44-pin 400 mil SOJ
- 44-pin 400 mil TSOP II
- 48-ball 6 mm × 8 mm CSP mBGA
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA
Logic block diagram
64K × 16
Array
OE
CE
WE
Column decoder
R
o
w
dec
ode
r
A0
A1
A2
A3
A4
A5
A7
V
CC
GND
A8 A9
A1
0
A1
1
A1
2
A1
3
A1
4
A1
5
Control circuit
I/O0–I/O7
I/O8–I/O15
UB
LB
I/O
buffer
A6
Pin arrangement
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
I/O13
I/O12
GND
V
CC
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
A0
CE
I/O0
I/O1
I/O2
I/O3
V
CC
GND
I/O4
I/O5
I/O6
I/O7
WE
A15
A14
A13
44-Pin SOJ, TSOP II (400 mil)
21
22
A12
NC
UB
LB
I/O15
I/O14
2A3
3A2
4A1
1A4
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
43
42
41
44
A6
A7
OE
A5
AS
7
C
1
0
2
Selection guide
Shaded areas indicate preliminary information.
AS7C31026-10
AS7C1026-12
AS7C31026-12
AS7C1026-15
AS7C31026-15
AS7C1026-20
AS7C31026-20 Unit
Maximum address access time 10 12 15 20 ns
Maximum output enable access time 5 6 8 10 ns
Maximum operating current
AS7C1026 – 160 150 140 mA
AS7C31026 125 110 100 90 mA
Maximum CMOS standby current
AS7C1026 – 3 3 3 mA
AS7C31026 3 3 3 3 mA
48-CSP mini Ball-Grid-Array Package
123456
ALB OE A
0
A
1
A
2
NC
BI/O8UB A3 A4 CE I/O0
CI/O9I/O10 A5 A6 I/O1 I/O2
DV
SS
I/O11 NC A7 I/O3 V
DD
EV
DD
I/O12 NC NC I/O4 V
SS
FI/O14I/O13 A14 A15 I/O5 I/O6
G I/O15 NC A12 A13 WE I/O7
HNC A8 A9A10A1 NC
Copyright ©1999 Alliance Semiconductor. All rights reserved.
®
AS7C1026
AS7C31026
DID 11-20011-A. 5/22/00 ALLIANCE SEMICONDUCTOR 1
5V/3.3V 64K×16 CMOS SRAM
Features
• AS7C1026 (5V version)
• AS7C31026 (3.3V version)
• Industrial and commercial versions
• Organization: 65,536 words x 16 bits
• Center power and ground pins for low noise
•High speed
- 10/12/15/20 ns address access time
- 5/6/8/10 ns output enable access time
• Low power consumption: ACTIVE
- 880 mW (AS7C1026) / max @ 12 ns
- 396 mW (AS7C31026) / max @ 12 ns
• Low power consumption: STANDBY
- 28 mW (AS7C1026) / max CMOS I/O
- 18 mW (AS7C31026) / max CMOS I/O
• 2.0V data retention
• Easy memory expansion with CE, OE inputs
• TTL-compatible, three-state I/O
• JEDEC standard packaging
- 44-pin 400 mil SOJ
- 44-pin 400 mil TSOP II
- 48-ball 6 mm × 8 mm CSP mBGA
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA
Logic block diagram
64K × 16
Array
OE
CE
WE
Column decoder
R
o
w
dec
ode
r
A0
A1
A2
A3
A4
A5
A7
V
CC
GND
A8 A9
A1
0
A1
1
A1
2
A1
3
A1
4
A1
5
Control circuit
I/O0–I/O7
I/O8–I/O15
UB
LB
I/O
buffer
A6
Pin arrangement
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
I/O13
I/O12
GND
V
CC
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
A0
CE
I/O0
I/O1
I/O2
I/O3
V
CC
GND
I/O4
I/O5
I/O6
I/O7
WE
A15
A14
A13
44-Pin SOJ, TSOP II (400 mil)
21
22
A12
NC
UB
LB
I/O15
I/O14
2A3
3A2
4A1
1A4
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
43
42
41
44
A6
A7
OE
A5
AS
7
C
1
0
2
Selection guide
Shaded areas indicate preliminary information.
AS7C31026-10
AS7C1026-12
AS7C31026-12
AS7C1026-15
AS7C31026-15
AS7C1026-20
AS7C31026-20 Unit
Maximum address access time 10 12 15 20 ns
Maximum output enable access time 5 6 8 10 ns
Maximum operating current
AS7C1026 – 160 150 140 mA
AS7C31026 125 110 100 90 mA
Maximum CMOS standby current
AS7C1026 – 3 3 3 mA
AS7C31026 3 3 3 3 mA
48-CSP mini Ball-Grid-Array Package
123456
ALB OE A
0
A
1
A
2
NC
BI/O8UB A3 A4 CE I/O0
CI/O9I/O10 A5 A6 I/O1 I/O2
DV
SS
I/O11 NC A7 I/O3 V
DD
EV
DD
I/O12 NC NC I/O4 V
SS
FI/O14I/O13 A14 A15 I/O5 I/O6
G I/O15 NC A12 A13 WE I/O7
HNC A8 A9A10A1 NC