C0083C0078C0055C0052C0076C0086C0067C0049C0071C0051C0050
C0083C0073C0078C0071C0076C0069 C0050C0262C0073C0078C0080C0085C0084 C0080C0079C0083C0073C0084C0073C0086C0069C0262C0079C0082 C0071C0065C0084C0069
SCES219N − APRIL 1999 − REVISED JUNE 2005
1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
C0068 Available in the Texas Instruments
NanoStar and NanoFree Packages
C0068 Supports 5-V V
CC
Operation
C0068 Inputs Accept Voltages to 5.5 V
C0068 Max t
pd
of 3.6 ns at 3.3 V
C0068 Low Power Consumption, 10-µA Max I
CC
C0068 ±24-mA Output Drive at 3.3 V
C0068 I
off
Supports Partial-Power-Down Mode
Operation
C0068 Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
C0068 ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
3
2
4
51AV
CC
Y
B
GND
DBV PACKAGE
(TOP VIEW)
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
51AV
CC
Y
B
GND
3
2
4
51AV
CC
Y
B
GND
A
GND
V
CC
Y
B
DRL PACKAGE
(TOP VIEW)
See mechanical drawings for dimensions.
1
4
2
3
5
description/ordering information
This single 2-input positive-OR gate is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC1G32 performs the Boolean function Y C0043 AC0041BorYC0043 A • B in positive logic.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Copyright  2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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