PRELIMINARY
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 21519 Rev: A Amendment/+3
Issue Date: April 1998
Am29DL800B
8 Megabit (1 M x 8-Bit/512 K x 16-Bit)
CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory
DISTINCTIVE CHARACTERISTICS
a73 Simultaneous Read/Write operations
— Host system can program or erase in one bank,
then immediately and simultaneously read from
the other bank
— Zero latency between read and write operations
— Read-while-erase
— Read-while-program
a73 Single power supply operation
— Full voltage range: 2.7 to 3.6 volt read and write
operations for battery-powered applications
a73 Manufactured on 0.35 µm process technology
— Compatible with 0.5 µm Am29DL800 device
a73 High performance
— Access times as fast as 70 ns
a73 Low current consumption (typical values
at 5 MHz)
— 7 mA active read current
— 21 mA active read-while-program or read-while-
erase current
— 17 mA active program-while-erase-suspended
current
— 200 nA in standby mode
— 200 nA in automatic sleep mode
— Standard t
CE
chip enable access time applies to
transition from automatic sleep mode to active
mode
a73 Flexible sector architecture
— Two 16 Kword, two 8 Kword, four 4 Kword, and
fourteen 32 Kword sectors in word mode
— Two 32 Kbyte, two 16 Kbyte, four 8 Kbyte, and
fourteen 64 Kbyte sectors in byte mode
— Any combination of sectors can be erased
— Supports full chip erase
a73 Unlock Bypass Program Command
— Reduces overall programming time when
issuing multiple program command sequences
a73 Sector protection
— Hardware method of locking a sector to prevent
any program or erase operation within that
sector
— Sectors can be locked in-system or via
programming equipment
— Temporary Sector Unprotect feature allows code
changes in previously locked sectors
a73 Top or bottom boot block configurations
available
a73 Embedded Algorithms
— Embedded Erase algorithm automatically
pre-programs and erases sectors or entire chip
— Embedded Program algorithm automatically
programs and verifies data at specified address
a73 Minimum 1,000,000 program/erase cycles
guaranteed per sector
a73 Package options
— 44-pin SO
— 48-pin TSOP
— 48-ball FBGA
a73 Compatible with JEDEC standards
— Pinout and software compatible with
single-power-supply flash standard
— Superior inadvertent write protection
a73 Data# Polling and Toggle Bits
— Provides a software method of detecting
program or erase cycle completion
a73 Ready/Busy# output (RY/BY#)
— Hardware method for detecting program or
erase cycle completion
a73 Erase Suspend/Erase Resume
— Suspends or resumes erasing sectors to allow
reading and programming in other sectors
— No need to suspend if sector is in the other bank
a73 Hardware reset pin (RESET#)
— Hardware method of resetting the device to
reading array data