Am29BDS323DT11AWKI
器件描述:32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
文件大小:746.23KB,共44页
Sponsor by e络盟
器件资料摘要:
PRELIMINARY
This Data Sheet states AMD’s current technical specifications regarding the Product described herein. This Data
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
Publication# 23476 Rev: B Amendment/+4
Issue Date: September 4, 2001
Refer to AMD’s Website (www.amd.com) for the latest information.
Am29BDS323D
32 Megabit (2 M x 16-Bit)
CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
DISTINCTIVE CHARACTERISTICS
a73 Single 1.8 volt read, program and erase (1.7 to
1.9 volt)
a73 Multiplexed Data and Address for reduced I/O
count
— A0–A15 multiplexed as D0–D15
— Addresses are latched with AVD# control inputs
while CE# low
a73 Simultaneous Read/Write operation
— Data can be continuously read from one bank
while executing erase/program functions in other
bank
— Zero latency between read and write operations
a73 Read access times at 40 MHz
— Burst access times of 20 ns @ 30 pF
at industrial temperature range
— Asynchronous random access times
of 110 ns @ 30 pF
— Synchronous random access times
of 120 ns @ 30 pF
a73 Burst length
— Continuous linear burst
a73 Power dissipation (typical values, 8 bits
switching, C
L
= 30 pF)
— Burst Mode Read: 25 mA
— Simultaneous Operation: 40 mA
— Program/Erase: 15 mA
— Standby mode: 0.2 µA
a73 Sector Architecture
— Eight 4 Kword sectors and sixty-three sectors of
32 Kwords each
— Bank A contains the eight 4 Kword sectors and
fifteen 32 Kword sectors
— Bank B contains forty-eight 32 Kword sectors
a73 Sector Protection
— Software command sector locking
— WP# protects the last two boot sectors
— All sectors locked when V
PP
= V
IL
a73 Software command set compatible with JEDEC
42.4 standards
— Backwards compatible with Am29F and Am29LV
families
a73 Minimum 1 million erase cycle guarantee
per sector
a73 20-year data retention at 125°C
— Reliable operation for the life of the system
a73 Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
a73 Data# Polling and toggle bits
— Provides a software method of detecting
program and erase operation completion
a73 Erase Suspend/Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
a73 Hardware reset input (RESET#)
— Hardware method to reset the device for reading
array data
a73 CMOS compatible inputs, CMOS compatible
outputs
a73 Low V
CC
write inhibit
a73 Package Option
— 47-ball FBGA