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74HC4046

器件描述:Phase-Locked Loop
器件厂商:SLS [System Logic Semiconductor]
文件大小:134.42KB,共12页
Sponsor by e络盟
器件资料摘要:
SL74HC4046


System Logic
Semiconductor SLS
Phase-Locked Loop
High-Performance Silicon-Gate CMOS
The device inputs are compatible with standard CMOS outputs;
with pullup resistors, they are compatible with LS/ALSTTL outputs.
The SL74HC4046 phase-locked loop contains three phase
comparators, a voltage-controlled oscillator (VCO) and unity gain op-
amp DEMOUT. The comparators have two common signal inputs,
COMPIN, and SIGIN. Input SIGIN and COMPIN can be used directly
coupled to large voltage signals, or indirectly coupled (with a series
capacitor to small voltage signals). The self-bias circuit adjusts small
voltage signals in the linear region of the amplifier. Phase comparator 1
(an exclusive OR gate) provides a digital error signal PC1OUT and
maintains 90 degrees phase shift at the center frequency between SIGIN
and COMPIN signals (both at 50% duty cycle). Phase comparator 2
(with leading-edge sensing logic) provides digital error signals PC2OUT
and PCPOUT and maintains a 0 degree phase shift between SIGIN and
COMPIN signals (duty cycle is immaterial). The linear VCO produces an
output signal VCOOUT whose frequency is determined by the voltage of
input VCOIN signal and the capacitor and resistors connected to pins
C1A, C1B, R1 and R2. The unity gain op-amp output DEMOUT with an external resistor is used where the VCOIN
signal is needed but no loading can be tolerated. The inhibit input, when high, disables the VCO and all on-amps
to minimize standby power consumption.
Applications include FM and FSK modulation and demodulation, frequency synthesis and multiplication,
frequency discrimination, tone decoding, data synchronization and conditioning, voltage-to-frequency
conversion and motor speed control.
• Low Power Consumption Characteristic of CMOS Device
• Operating Speeds Similary to LS/ALSTTL
• Wide Operating Voltage Range: 3.0 to 6.0 V
• Low Input Current: 1.0 µA Maximum (except SIGIN and
COMPIN)
• Low Quiescent Current: 80 µA Maximum (VCO disabled)
• High Noise Immunity Characteristic of CMOS Devices
• Diode Protection on all Inputs
Pin No. Symbol Name and Function
1 PCPOUT Phase Comparator Pulse Output
2 PC1OUT Phase Comparator 1 Output
3 COMPIN Comparator Input
4 VCOOUT VCO Output
5 INH Inhibit Input
6 C1A Capacitor C1 Connection A
7 C1B Capacitor C1 Connection B
8 GND Ground (0 V) VSS
9 VCOIN VCO Input
10 DEMOUT Demodulator Output
11 R1 Resistor R1 Connection
12 R2 Resistor R2 Connection
13 PC2OUT Phase Comparator 2 Output
14 SIGIN Signal Input
15 PC3OUT Phase Comparator 3 Output
16 VCC Positive Supply Voltage

ORDERING INFORMATION
SL74HC4046N Plastic
SL74HC4046D SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT