74HC273
器件描述：Octal D Flip-Flop with Common Clock and Reset
器件厂商：SLS [System Logic Semiconductor]
文件大小：49.16KB，共5页
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SL74HC273
System Logic
Semiconductor SLS
Octal D Flip-Flop with Common Clock and Reset
High-Performance Silicon-Gate CMOS
The SL74HC273 is identical in pinout to the LS/ALS273. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device consists of eight D flip-flops with common Clock and
Reset inputs. Each flip-flop is loaded with a low-to-high transition of
the Clock input. Reset is asynchronous and active low.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
SL74HC273N Plastic
SL74HC273D SOIC
TA = -55° to 125° C for all packages
FUNCTION TABLE
Inputs Output
Reset Clock D Q
L X X L
H H H
H L L
H L X no change
H X no change
X = don’t care
LOGIC DIAGRAM
PIN 20=VCC
PIN 10 = GND
PIN ASSIGNMENT
System Logic
Semiconductor SLS
Octal D Flip-Flop with Common Clock and Reset
High-Performance Silicon-Gate CMOS
The SL74HC273 is identical in pinout to the LS/ALS273. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device consists of eight D flip-flops with common Clock and
Reset inputs. Each flip-flop is loaded with a low-to-high transition of
the Clock input. Reset is asynchronous and active low.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
SL74HC273N Plastic
SL74HC273D SOIC
TA = -55° to 125° C for all packages
FUNCTION TABLE
Inputs Output
Reset Clock D Q
L X X L
H H H
H L L
H L X no change
H X no change
X = don’t care
LOGIC DIAGRAM
PIN 20=VCC
PIN 10 = GND
PIN ASSIGNMENT