AM27X1024
器件描述：1 Megabit (64 K x 16-Bit) CMOS ExpressROM Device
器件厂商：AMD [Advanced Micro Devices]
厂商主页：http://www.amd.com
文件大小：136.2KB，共10页
Sponsor by e络盟器件资料摘要：
FINAL
Publication# 12079 Rev: F Amendment/0
Issue Date: May 1998
Am27X1024
1 Megabit (64 K x 16-Bit) CMOS ExpressROM Device
DISTINCTIVE CHARACTERISTICS
a73 As an OTP EPROM alternative:
— Factory optimized programming
— Fully tested and guaranteed
a73 As a Mask ROM alternative:
— Shorter leadtime
— Lower volume per code
a73 Fast access time
— 70 ns
a73 Single +5 V power supply
a73 Compatible with JEDEC-approved EPROM
pinout
a73 ±10% power supply tolerance
a73 High noise immunity
a73 Low power dissipation
— 20 µA maximum CMOS standby current
a73 Available in Plastic Dual-In-line Package (PDIP)
and Plastic Leaded Chip Carrier (PLCC)
a73 Latch-up protected to 100 mA from –1 V to
V
CC
+ 1 V
a73 Versatile features for simple interfacing
— Both CMOS and TTL input/output compatibility
— Two line control functions
GENERAL DESCRIPTION
The Am27X1024 is a factory programmed and tested
OTP EPROM. It is programmed after packaging prior to
final test. Every device is rigorously tested under AC
and DC operating conditions to your stable code. It is
organized as 64 Kwords by 16 bits per word and is
available in plastic dual in-line packages (PDIP), as
well as plastic leaded chip carrier (PLCC) packages.
ExpressROM devices provide a board-ready memory
solution for medium to high volume codes with short
leadtimes. This offers manufacturers a cost-effective
and flexible alternative to OTP EPROMs and mask pro-
grammed ROMs.
Data can be accessed as fast as 70 ns, allowing
high-performance microprocessors to operate with re-
duced WAIT states. The device offers separate Output
Enable (OE#) and Chip Enable (CE#) controls, thus
eliminating bus contention in a multiple bus micropro-
cessor system.
AMD’s CMOS process technology provides high
speed, low power, and high noise immunity. Typical
power consumption is only 125 mW in active mode,
and 100 µW in standby mode.
BLOCK DIAGRAM
12079F-1
A0–A15
Address
Inputs
CE#
OE#
V
CC
V
SS
Data Outputs DQ0–DQ15
Output
Buffers
Y
Gating
1,048,576
Bit Cell
Matrix
X
Decoder
Y
Decoder
Output Enable
Chip Enable
and
Prog Logic
Publication# 12079 Rev: F Amendment/0
Issue Date: May 1998
Am27X1024
1 Megabit (64 K x 16-Bit) CMOS ExpressROM Device
DISTINCTIVE CHARACTERISTICS
a73 As an OTP EPROM alternative:
— Factory optimized programming
— Fully tested and guaranteed
a73 As a Mask ROM alternative:
— Shorter leadtime
— Lower volume per code
a73 Fast access time
— 70 ns
a73 Single +5 V power supply
a73 Compatible with JEDEC-approved EPROM
pinout
a73 ±10% power supply tolerance
a73 High noise immunity
a73 Low power dissipation
— 20 µA maximum CMOS standby current
a73 Available in Plastic Dual-In-line Package (PDIP)
and Plastic Leaded Chip Carrier (PLCC)
a73 Latch-up protected to 100 mA from –1 V to
V
CC
+ 1 V
a73 Versatile features for simple interfacing
— Both CMOS and TTL input/output compatibility
— Two line control functions
GENERAL DESCRIPTION
The Am27X1024 is a factory programmed and tested
OTP EPROM. It is programmed after packaging prior to
final test. Every device is rigorously tested under AC
and DC operating conditions to your stable code. It is
organized as 64 Kwords by 16 bits per word and is
available in plastic dual in-line packages (PDIP), as
well as plastic leaded chip carrier (PLCC) packages.
ExpressROM devices provide a board-ready memory
solution for medium to high volume codes with short
leadtimes. This offers manufacturers a cost-effective
and flexible alternative to OTP EPROMs and mask pro-
grammed ROMs.
Data can be accessed as fast as 70 ns, allowing
high-performance microprocessors to operate with re-
duced WAIT states. The device offers separate Output
Enable (OE#) and Chip Enable (CE#) controls, thus
eliminating bus contention in a multiple bus micropro-
cessor system.
AMD’s CMOS process technology provides high
speed, low power, and high noise immunity. Typical
power consumption is only 125 mW in active mode,
and 100 µW in standby mode.
BLOCK DIAGRAM
12079F-1
A0–A15
Address
Inputs
CE#
OE#
V
CC
V
SS
Data Outputs DQ0–DQ15
Output
Buffers
Y
Gating
1,048,576
Bit Cell
Matrix
X
Decoder
Y
Decoder
Output Enable
Chip Enable
and
Prog Logic