EEWorld首页 新闻 论坛 博客 白皮书 专题 电子电路 电子器件 单片机 嵌入式 模拟电路 DSP FPGA 电源管理 手机/便携 医疗电子 汽车电子 工业控制
厂商索引:A-B-C-D-E-F-G-H-I-J-K-L-M-N-O-P-Q-R-S-T-U-V-W-X-Y-Z

AM24LC08

器件描述:2-Wire Serial 8K-Bit (1024 x 8) CMOS Electrically Erasable PROM
器件厂商:ANACHIP [Anachip Corp]
文件大小:202.98KB,共10页
Sponsor by e络盟
器件资料摘要:
2-Wire Serial 8K-Bit (1024 x 8) CMOS Electrically Erasable PROM AM24LC08

This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev.A1 Oct 20, 2003
1/10
ATC

null Features

•State- of- the- art architecture
- Non-volatile data storage
- Standard voltage and low voltage operation
(Vcc = 2.7V to 5.5V) for AM24LC08
• 2-wire I
2
C serial interface
- Provides bi-directional data transfer protocol
• 16-byte page write mode
- Minimizes total write time per word
• Self-timed write-cycle (including auto-erase)
• Durable and Reliable
- 40 years data retention
- Minimum of 1M write/erase cycles per word
- Unlimited read cycles
- ESD protection
• Low standby current
• Packages: PDIP-8L, SOP-8L




null Connection Diagram

VCC
WP
SCL
SDA
NC
NC
A2
VSS
PDIP / SOP
8
7
6
5
1
2
3
4


null General Description

The AM24LC08 is a non-volatile, 8192-bit serial
EEPROM with conforms to all specifications in I
2
C 2
wire protocol. The whole memory can be disabled
(Write Protected) by connecting the WP pin to Vcc.
This section of memory then becomes unalterable
unless WP is switched to Vss. The AM24LC08
communication protocol uses CLOCK(SCL) and
DATA I/O(SDA) lines to synchronously clock data
between the master (for example a
microcomputer)and the slave EEPROM
devices(s) .In addition, the bus structure allows for a
maximum of 16K of EEPROM memory. This
supports the family in 2K, 4K, 8K devices, allowing
the user to configure the memory as the application
requires with any combination of EEPROMs (not to
exceed 16K).
Anachip EEPROMs are designed and tested for
application requiring high endurance, high reliability,
and low power consumption.


null Pin Assignments


Name Description
NC No connect
A2 Device address inputs
VSS Ground
SDA Data I/O
SCL Clock input
WP Write protect
VCC Power pin


null Ordering Information


Type Package
08 =8K S: SOP-8L
N: PDIP-8L
Temp. grade
AM 24 LC 08 X X X
Packing
Blank : C70~C0
oo
+
I :
V :
Blank : Tube
A : Taping
Operating Voltage
LC: 2.7~5.5V, CMOS
C85~C40-
oo
+
C125~C40-
oo
+