1
DESCRIPTION
The CAT24WC128 is a 128K-bit Serial CMOS E
2
PROM
internally organized as 16384 words of 8 bits each.
Catalyst’s advanced CMOS technology substantially
reduces device power requirements. The
Preliminary
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I
2
C Bus Protocol.
a73 Write Protect Feature
– Entire Array Protected When WP at V
IH
a73 100,000 Program/Erase Cycles
a73 100 Year Data Retention
a73 8-Pin DIP, 8-Pin SOIC or 14-pin TSSOP
CAT24WC128 features a 64-byte page write buffer. The
device operates via the I
2
C bus serial interface and is
available in 8-pin DIP, 8-pin SOIC or 14-pin TSSOP
packages.
PIN CONFIGURATION
BLOCK DIAGRAM
PIN FUNCTIONS
Pin Name Function
SDA Serial Data/Address
SCL Serial Clock
WP Write Protect
V
CC
+1.8V to +6V Power Supply
V
SS
Ground
24WC128 F02
CAT24WC128
128K-Bit I
2
C Serial CMOS E
2
PROM
a73 1MHz I
2
C Bus Compatible*
a73 1.8 to 6 Volt Operation
a73 Low Power CMOS Technology
a73 64-Byte Page Write Buffer
a73 Self-Timed Write Cycle with Auto-Clear
a73 Commercial, Industrial and Automotive
Temperature Ranges
FEATURES
DIP Package (P)
SOIC Package (J,K)
24WC128 F01
© 1999 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
NC
NC
V
SS
NC
NC
V
CC
WP
SCL
SDA
1
2
3
4
8
7
6
5
NC
V
CC
WP
SCL
SDA
1
2
3
4
8
7
6
5
V
SS
NC
D
OUT
ACK
SENSE AMPS
SHIFT REGISTERS
CONTROL
LOGIC
WORD ADDRESS
BUFFERS
START/STOP
LOGIC
STATE COUNTERS
E
2
PROM
256X512
V
CC
EXTERNAL LOAD
COLUMN
DECODERS
XDEC
DATA IN STORAGE
HIGH VOLTAGE/
TIMING CONTROL
V
SS
WP
SCL
SDA
256
512
Doc. No. 25060-00 6/99 S-1
NC
NC
NC
NC
NC
2
3
4
13
12
11
5
6
7
10
9
8
114
SDA
WP
NC
NC
NC
SCL
NC
V
SS
V
CC
TSSOP Package (U14)