5241
器件描述：Quad Digitally Programmable Potentiometers (DPP⑩) with 64 Taps and 2-wire Interface
器件厂商：CATALYST [Catalyst Semiconductor]
文件大小：111.15KB，共16页
Sponsor by e络盟器件资料摘要：
1
DESCRIPTION
The CAT5241 is four Digitally Programmable
Potentiometers (DPPs™) integrated with control logic
and 16 bytes of NVRAM memory. Each DPP consists of
a series of 63 resistive elements connected between two
externally accessible end points. The tap points between
each resistive element are connected to the wiper outputs
with CMOS switches. A separate 6-bit control register
(WCR) independently controls the wiper tap switches for
each DPP. Associated with each wiper control register
are four 6-bit non-volatile memory data registers (DR)
used for storing up to four wiper settings. Writing to the
wiper control register or any of the non-volatile data
CAT5241
Quad Digitally Programmable Potentiometers (DPP™)
with 64 Taps and 2-wire Interface
FEATURES
a73 Four linear-taper digitally programmable
potentiometers
a73 64 resistor taps per potentiometer
a73 End to end resistance 2.5kΩ, 10kΩ, 50kΩ or 100kΩ
a73 Potentiometer control and memory access via
2-wire interface (I
2
C like)
a73 Low wiper resistance, typically 80Ω
a73 Nonvolatile memory storage for up to four wiper
settings for each potentiometer
a73 Automatic recall of saved wiper settings at
power up
a73 2.5 to 6.0 volt operation
a73 Standby current less than 1µA
a73 1,000,000 nonvolatile WRITE cycles
a73 100 year nonvolatile memory data retention
a73 20-lead SOIC and TSSOP packages
a73 Industrial temperature range
PIN CONFIGURATION FUNCTIONAL DIAGRAM
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Document No. 2011, Rev. J
registers is via a 2-wire serial bus (I
2
C-like). On power-
up, the contents of the first data register (DR0) for each
of the four potentiometers is automatically loaded into its
respective wiper control register (WCR).
The CAT5241 can be used as a potentiometer or as a
two terminal, variable resistor. It is intended for circuit
level or system level adjustments in a wide variety of
applications.
H
A
L
O
G
EN
F
R
E
E
TM
L
E
A
D F R
E
E
R
H0
W0
W2
W3
W1
H1 H2 H3
R R R
R
L0 L1 L2 L3
R R R
WIPER
CONTROL
REGISTERS
NONVOLATILE
DATA
REGISTERS
2-WIRE BUS
INTERFACE
CONTROL
LOGIC
SCL
SDA
A0
A1
A2
A3
R
R
R
R
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
CAT
5241
R
W0
R
L0
R
H0
A
0
A
2
R
W1
R
L1
RH
1
SDA
GND
V
CC
R
W3
R
L3
R
H3
A
1
A
3
SCL
R
W2
R
L2
R
H2
SOIC Package (J, W)
TSSOP Package (U, Y)
DESCRIPTION
The CAT5241 is four Digitally Programmable
Potentiometers (DPPs™) integrated with control logic
and 16 bytes of NVRAM memory. Each DPP consists of
a series of 63 resistive elements connected between two
externally accessible end points. The tap points between
each resistive element are connected to the wiper outputs
with CMOS switches. A separate 6-bit control register
(WCR) independently controls the wiper tap switches for
each DPP. Associated with each wiper control register
are four 6-bit non-volatile memory data registers (DR)
used for storing up to four wiper settings. Writing to the
wiper control register or any of the non-volatile data
CAT5241
Quad Digitally Programmable Potentiometers (DPP™)
with 64 Taps and 2-wire Interface
FEATURES
a73 Four linear-taper digitally programmable
potentiometers
a73 64 resistor taps per potentiometer
a73 End to end resistance 2.5kΩ, 10kΩ, 50kΩ or 100kΩ
a73 Potentiometer control and memory access via
2-wire interface (I
2
C like)
a73 Low wiper resistance, typically 80Ω
a73 Nonvolatile memory storage for up to four wiper
settings for each potentiometer
a73 Automatic recall of saved wiper settings at
power up
a73 2.5 to 6.0 volt operation
a73 Standby current less than 1µA
a73 1,000,000 nonvolatile WRITE cycles
a73 100 year nonvolatile memory data retention
a73 20-lead SOIC and TSSOP packages
a73 Industrial temperature range
PIN CONFIGURATION FUNCTIONAL DIAGRAM
© 2004 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Document No. 2011, Rev. J
registers is via a 2-wire serial bus (I
2
C-like). On power-
up, the contents of the first data register (DR0) for each
of the four potentiometers is automatically loaded into its
respective wiper control register (WCR).
The CAT5241 can be used as a potentiometer or as a
two terminal, variable resistor. It is intended for circuit
level or system level adjustments in a wide variety of
applications.
H
A
L
O
G
EN
F
R
E
E
TM
L
E
A
D F R
E
E
R
H0
W0
W2
W3
W1
H1 H2 H3
R R R
R
L0 L1 L2 L3
R R R
WIPER
CONTROL
REGISTERS
NONVOLATILE
DATA
REGISTERS
2-WIRE BUS
INTERFACE
CONTROL
LOGIC
SCL
SDA
A0
A1
A2
A3
R
R
R
R
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
CAT
5241
R
W0
R
L0
R
H0
A
0
A
2
R
W1
R
L1
RH
1
SDA
GND
V
CC
R
W3
R
L3
R
H3
A
1
A
3
SCL
R
W2
R
L2
R
H2
SOIC Package (J, W)
TSSOP Package (U, Y)