ADC08161
500 ns A/D Converter with S/H Function and
2.5V Bandgap Reference
General Description
Using a patented multi-step A/D conversion technique, the
8-bit ADC08161 CMOS A/D converter offers 500 ns conver-
sion time, internal sample-and-hold (S/H), a 2.5V bandgap
reference, and dissipates only 100 mW of power. The
ADC08161 performs an 8-bit conversion with a 2-bit voltage
estimator that generates the 2 MSBs and two low-resolution
(3-bit) flashes that generate the 6 LBSs.
Input signals are tracked and held by the input sampling cir-
cuitry, eliminating the need for an external sample-and-hold.
The ADC08161 can perform accurate conversions of
full-scale input signals at frequencies from DC to typically
more than 300 kHz (full power bandwidth) without the need
of an external sample-and-hold (S/H).
For ease of interface to microprocessors, this part has been
designed to appear as a memory location or I/O port without
the need for external interfacing logic.
Key Specifications
n Resolution 8 Bits
n Conversion time (t
CONV
) 560 ns max (WR-RD Mode)
n Full power bandwidth 300 kHz (typ)
n Throughput rate 1.5 MHz min
n Power dissipation 100 mW max
n Total unadjusted error ±
1
⁄2 LSB and ±1 LSB max
Features
n No external clock required
n Analog input voltage range from GND to V
+
n 2.5V bandgap reference
Applications
n Mobile telecommunications
n Hard-disk drives
n Instrumentation
n High-speed data acquisition systems
Block Diagram
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
DS011149-1
June 1999
ADC08161
500
ns
A/D
Converter
with
S/H
Function
and
2.5V
Bandgap
Reference
© 1999 National Semiconductor Corporation DS011149 www.national.com