ADC0803
器件描述：8-Bit, Microprocessor-Compatible, A/D Converters
器件厂商：INTERSIL [Intersil Corporation]
文件大小：580.45KB，共17页
Sponsor by e络盟器件资料摘要：
1
®
FN3094.4
ADC0803, ADC0804
8-Bit, Microprocessor-Compatible, A/D
Converters
The ADC080X family are CMOS 8-Bit, successive-
approximation A/D converters which use a modified
potentiometric ladder and are designed to operate with the
8080A control bus via three-state outputs. These converters
appear to the processor as memory locations or I/O ports,
and hence no interfacing logic is required.
The differential analog voltage input has good common-
mode-rejection and permits offsetting the analog zero-input-
voltage value. In addition, the voltage reference input can be
adjusted to allow encoding any smaller analog voltage span
to the full 8 bits of resolution.
Typical Application Schematic
Features
• 80C48 and 80C80/85 Bus Compatible - No Interfacing
Logic Required
• Conversion Time . . . . . . . . . . . . . . . . . . . . . . . . . . <100µs
• Easy Interface to Most Microprocessors
• Will Operate in a “Stand Alone” Mode
• Differential Analog Voltage Inputs
• Works with Bandgap Voltage References
• TTL Compatible Inputs and Outputs
• On-Chip Clock Generator
• Analog Voltage Input Range
(Single + 5V Supply) . . . . . . . . . . . . . . . . . . . . . . 0V to 5V
• No Zero-Adjust Required
• 80C48 and 80C80/85 Bus Compatible - No Interfacing
Logic Required
Pinout
ADC0803, ADC0804
(PDIP)
TOP VIEW
3
2
1
12
11
5
15
14
13
18
17
16
7
6
10
9
8
4
19
20
WR
RD
CS
DB
6
DB
7
INTR
DB
3
DB
4
DB
5
DB
0
DB
1
DB
2
CLK IN
CLK R
V+
V
IN
(-)
V
IN
(+)
DGND
V
REF
/2
AGND
ANY
µPROCESSOR
8-BIT RESOLUTION
OVER ANY
DESIRED
ANALOG INPUT
VOLTAGE RANGE
DIFF
INPUTS
10K
150pF
V
REF
/2
µ
P BUS
+5V
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
WR
RD
CS
CLK IN
INTR
V
IN
(-)
V
IN
(+)
DGND
V
REF
/2
AGND
V+ OR V
REF
CLK R
DB
0 (LSB)
DB
1
DB
2
DB
3
DB
4
DB
5
DB
6
DB
7 (MSB)
Ordering Information
PART NUMBER ERROR EXTERNAL CONDITIONS TEMP. RANGE (
o
C) PACKAGE PKG. NO
ADC0803LCN ±
1
/
2
LSB V
REF
/2 Adjusted for Correct Full Scale
Reading
0 to 70 20 Ld PDIP E20.3
ADC0804LCN ±1 LSB V
REF
/2 = 2.500V
DC
(No Adjustments) 0 to 70 20 Ld PDIP E20.3
Data Sheet August 2002
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
®
FN3094.4
ADC0803, ADC0804
8-Bit, Microprocessor-Compatible, A/D
Converters
The ADC080X family are CMOS 8-Bit, successive-
approximation A/D converters which use a modified
potentiometric ladder and are designed to operate with the
8080A control bus via three-state outputs. These converters
appear to the processor as memory locations or I/O ports,
and hence no interfacing logic is required.
The differential analog voltage input has good common-
mode-rejection and permits offsetting the analog zero-input-
voltage value. In addition, the voltage reference input can be
adjusted to allow encoding any smaller analog voltage span
to the full 8 bits of resolution.
Typical Application Schematic
Features
• 80C48 and 80C80/85 Bus Compatible - No Interfacing
Logic Required
• Conversion Time . . . . . . . . . . . . . . . . . . . . . . . . . . <100µs
• Easy Interface to Most Microprocessors
• Will Operate in a “Stand Alone” Mode
• Differential Analog Voltage Inputs
• Works with Bandgap Voltage References
• TTL Compatible Inputs and Outputs
• On-Chip Clock Generator
• Analog Voltage Input Range
(Single + 5V Supply) . . . . . . . . . . . . . . . . . . . . . . 0V to 5V
• No Zero-Adjust Required
• 80C48 and 80C80/85 Bus Compatible - No Interfacing
Logic Required
Pinout
ADC0803, ADC0804
(PDIP)
TOP VIEW
3
2
1
12
11
5
15
14
13
18
17
16
7
6
10
9
8
4
19
20
WR
RD
CS
DB
6
DB
7
INTR
DB
3
DB
4
DB
5
DB
0
DB
1
DB
2
CLK IN
CLK R
V+
V
IN
(-)
V
IN
(+)
DGND
V
REF
/2
AGND
ANY
µPROCESSOR
8-BIT RESOLUTION
OVER ANY
DESIRED
ANALOG INPUT
VOLTAGE RANGE
DIFF
INPUTS
10K
150pF
V
REF
/2
µ
P BUS
+5V
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
WR
RD
CS
CLK IN
INTR
V
IN
(-)
V
IN
(+)
DGND
V
REF
/2
AGND
V+ OR V
REF
CLK R
DB
0 (LSB)
DB
1
DB
2
DB
3
DB
4
DB
5
DB
6
DB
7 (MSB)
Ordering Information
PART NUMBER ERROR EXTERNAL CONDITIONS TEMP. RANGE (
o
C) PACKAGE PKG. NO
ADC0803LCN ±
1
/
2
LSB V
REF
/2 Adjusted for Correct Full Scale
Reading
0 to 70 20 Ld PDIP E20.3
ADC0804LCN ±1 LSB V
REF
/2 = 2.500V
DC
(No Adjustments) 0 to 70 20 Ld PDIP E20.3
Data Sheet August 2002
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved