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ADC-321

器件描述:8-Bit, 50MHz Video A/D Converter
器件厂商:ETC [ETC]
厂商主页:
文件大小:174.68KB,共8页
Sponsor by e络盟
器件资料摘要:
® ®
DATEL, Inc., Mansfield, MA 02048 (USA.) • Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 • Email: sales@datel.com • Internet: www.datel.com
ADC-321
8-Bit, 50MHz
Video A/D Converter
1 BIT 8 (LSB) 32 NO CONNECTION
2 BIT 7 31 DIGITAL GROUND (DGND)
3 BIT 6 30 OUTPUT ENABLE (OE)
4 BIT 5 29 CLAMP ENABLE (CLE)
5 BIT 4 28 DIGITAL GROUND (DGND)
6 BIT 3 27 CLAMP CONTROL (COP)
7 BIT 2 26 CLAMP REF. (VREF)
8 BIT 1 (MSB) 25 REF. BOTTOM SENSE (VRBS)
9 TEST 24 REF. BOTTOM (VRB)
10 +DVS (Digital) 23 ANALOG GROUND (AGND)
11 TEST 22 ANALOG GROUND (AGND)
12 A/D CLOCK 21 ANALOG IN (VIN)
13 NO CONNECTION 20 +AVS (Analog)
14 NO CONNECTION 19 +AVS (Analog)
15 CLAMP IN (CLP) 18 REF. TOP (VRT)
16 +AVS (Analog) 17 REF. TOP SENSE (VRTS)
FEATURES
• Low power dissipation (180mW max.)
• Input signal bandwith (100MHz)
• Optional synchronized clamp function
• Low input capacitance (15pF typ.)
• +5V or +5V/+3.3V power supply operation
• Differential nonlinearity (±½LSB max.)
• Optional self-biased reference
• CMOS/TTL compatible inputs
• Outputs 3-state TTL compatible
• Surface mount package
GENERAL DESCRIPTION
The ADC-321 is an 8-bit, high speed, monolithic CMOS, sub-
ranging A/D converter. The ADC-321 achieves a sampling rate
comparable to flash converters by employing a sub-ranging
technique which uses multiple comparator blocks each
containing a sample-and-hold amplifier. The ADC-321 can
operate with either a single +5V or dual +5V and +3.3V power
source to allow easy interfacing with 3.3V logic.
An optional synchronous clamp function useful for video signal
processing is provided. The ADC-321 is well suited for the
portable video signal processors due to its low 125mW typical
power dissipation. The ADC-321 also features ±0.5 LSB max.
differential non-linearity, a self bias function that can eliminate the
need for external references, SNR with THD of 45dB, a small
32-pin QFP package and an operating temperature range
of –40 to +85°C
INPUT/OUTPUT CONNECTIONS
Figure 1. ADC-321 Functional Block Diagram
PIN FUNCTION PIN FUNCTION
1 BIT 8 (LSB)
2 BIT 7
3 BIT 6
4 BIT 5
Reference
Supply
4-Bit
Lower
Sampling
Comparator
A
B
Clock
Generator
4-Bit
Upper
Sampling
Comparator
4-Bit
Lower
Encoder
A
B
4-Bit
Upper
Encoder
Upper
Data
Latch
Lower
Data
Latch

+ D-FF
31 DGND
30 OUTPUT ENABLE
5 BIT 4
6 BIT 3
7 BIT 2
8 BIT 1 (MSB)
12 A/D CLOCK
15 CLAMP IN
9 TEST (Open)
10 +DVS
11 TEST (Open)
16
17
18
19
21
20
VIN
+AVS
+AVS
VRT
+AVS
VRTS
22AGND
23AGND
24VRB
25VRBS
26VREF
27CLAMP CONTROL
29CLAMP ENABLE
28DGND