REV PrA
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a
2 Pair/1 Pair ETSI Compatible
HDSL Analog Front End
Preliminary Technical Data AD5011
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 Fax: 781/326-8703
World Wide Web Site: hppt://www.analog.com
FEATURES
Integrated front End for Single Pair or Two Pair HDSL
Systems
Meets ETSI Specifications
Supports 1168 kbps and 2.32 Mbps
Programmable Filtering Supports Adaptive HDSL
Transmit and Receive Signal Path Functions
Receive Hybrid Amplifier, PGA, ADC and Adaptable
Filter
Transmit DAC, Adaptable Filter and Differential
Outputs
Normal Loopback
Serial Interface to Digital Transceivers
Single 3 V Power Supply
FUNCTIONAL BLOCK DIAGRAM
GENERAL DESCRIPTION
The AD5011 is an analog front end for two pair or single
pair HDSL applications that use 1168 kbps or 2.32 Mbps
data rates. The device integrates all the transmit and receive
functional blocks. A standard serial interface is used to
communicate with the DAC and ADC. The filters in both
the transmit and receive paths are programmable which
allows adaptive HDSL to be performed also. The part is
available in a 48-pin LQFP package and is specified for a
temperature range of -40
o
C to +85
o
C.
14-Bit DAC
6 Pole Adaptive
Bessel Filter
PGA
Line
Driver
HybridPGA
4 Pole Adaptive
Butterworth Filter
ADC
Buffer
12-Bit ADC
SPI
SPICLK
TFS
DT
DR
RESETB
PWRDOWNB
TxDATA
TxSYNC
TxCLK
ADCCLK
SCLK
SDO
DR
CAP-T
CAP-B
REF-COM
VREF
Tx-DECOUP
DRV-OUTP
HYBIN-2B
AD
CI
NN
AD
CI
NP
FI
LO
U
T
P
FI
LO
U
T
N
0 dB
-6 dB
-6 dB
-3 dB
0 dB
+3 dB
+6 dB
DRV-OUTN
HYBIN-2A
HYBIN-1A
HYBIN-1B
VDRIVE
CM-LVL
Control/
Configuration
PRELIMINARY TECHNICAL DATA