A43L3616

2M X 16 Bit X 4 Banks Synchronous DRAM
(February, 2002, Version 3.0) 1 AMIC Technology, Inc.


Features

n JEDEC standard 3.3V power supply
n LVTTL compatible with multiplexed address
n Four banks / Pulse RAS
n MRS cycle with address key programs
- CAS Latency (2,3)
- Burst Length (1,2,4,8 & full page)
- Burst Type (Sequential & Interleave)
n All inputs are sampled at the positive going edge of
the system clock
n Clock Frequency: 166MHz @ CL=3
143MHz @ CL=3
n Burst Read Single-bit Write operation
n DQM for masking
n Auto & self refresh
n 64ms refresh period (4K cycle)
n 54 Pin TSOP (II)
n Low Self Refresh Current version for –V grade


General Description
The A43L3616 is 134,217,728 bits synchronous high data
rate Dynamic RAM organized as 4 X 2,097,152 words by
16 bits, fabricated with AMIC’s high performance CMOS
technology. Synchronous design allows precise cycle
control with the use of system clock. I/O transactions are
possible on every clock cycle. Range of operating
frequencies, programmable latencies allows the same
device to be useful for a variety of high bandwidth, high
performance memory system applications.

Pin Configuration
n TSOP (II)

A43L3616V
54 53 52 51 50 49 48 47 46 45 4344 42 41 40 39 38 37 36 35 34 33 32 31 30
1 2 3 4 5 6 7 8 9 10 1211 13 14 15 16 17 18 19 20 21 22 23 24 25
VSS DQ
15
VSSQ DQ
14
DQ
13
VDDQ DQ
12
DQ
11
VSSQ DQ
10
DQ
9
VDDQ DQ
8
VSS UDQM CK CKE NC A9 A8 A7 A6 A5 A4 VSS
VDD DQ
0
VDDQ
DQ
1
DQ
2
VSSQ DQ
3
DQ
4
VDDQ
DQ
5
DQ
6
VSSQ DQ
7
VDD LDQM WE CAS RAS CS
A10/AP
BS1BS0 A0 A1 A2
26 27
2829
A3 VDD
A11NC