82596CA
器件描述：HIGH-PERFORMANCE 32-BIT LOCAL AREA NETWORK COPROCESSOR
器件厂商：INTEL [Intel Corporation]
文件大小：761.64KB，共76页
Sponsor by e络盟器件资料摘要：
*Other brands and names are the property of their respective owners.
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or
copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel retains the right to make
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.
October 1995COPYRIGHT ' INTEL CORPORATION, 1996 Order Number: 290218-006
82596CA
HIGH-PERFORMANCE 32-BIT LOCAL
AREA NETWORK COPROCESSOR
Y
Performs Complete CSMA/CD Medium
Access Control (MAC) Functions—
Independently of CPU
— IEEE 802.3 (EOC) Frame Delimiting
Y
Supports Industry Standard LANs
— IEEE TYPE 10BASE-T,
IEEE TYPE 10BASE5 (Ethernet*),
IEEE TYPE 10BASE2 (Cheapernet),
IEEE TYPE 1BASE5 (StarLAN),
and the Proposed Standard
10BASE-F
— Proprietary CSMA/CD Networks Up
to 20 Mb/s
Y
On-Chip Memory Management
— Automatic Buffer Chaining
— Buffer Reclamation after Receipt of
Bad Frames; Optional Save Bad
Frames
— 32-Bit Segmented or Linear (Flat)
Memory Addressing Formats
Y
Network Management and Diagnostics
— Monitor Mode
— 32-Bit Statistical Counters
Y
82586 Software Compatible
Y
Self-Test Diagnostics
Y
Optimized CPU Interface
— Optimized Bus Interface to Intel’s
i486
TM
DX, i486
TM
SX, i487
TM
SX and
80960CA Processors
— 33 MHz, 25 MHz, 20 MHz and 16 MHz
Clock Frequencies
— Supports Big Endian and Little
Endian Byte Ordering
Y
32-Bit Bus Master Interface
— 106 MB/s Bus Bandwidth
— Burst Bus Transfers
— Bus Throttle Timers
— Transfers Data at 100% of Serial
Bandwidth
— 128-Byte Receive FIFO, 64-Byte
Transmit FIFO
Y
Configurable Initialization Root for Data
Structures
Y
High-Speed, 5V, CHMOS** IV
Technology
Y
132-Pin Plastic Quad Flat Pack (PQFP)
and PGA Package
(See Packaging Spec Order No. 240800-001,
Package Type KU and A)
i486 is a trademark of Intel Corporation.
*Ethernet is a registered trademark of Xerox Corporation.
**CHMOS is a patented process of Intel Corporation.
290218–1
Figure 1. 82596CA Block Diagram
Information in this document is provided in connection with Intel products. Intel assumes no liability whatsoever, including infringement of any patent or
copyright, for sale and use of Intel products except as provided in Intel’s Terms and Conditions of Sale for such products. Intel retains the right to make
changes to these specifications at any time, without notice. Microcomputer Products may have minor variations to this specification known as errata.
October 1995COPYRIGHT ' INTEL CORPORATION, 1996 Order Number: 290218-006
82596CA
HIGH-PERFORMANCE 32-BIT LOCAL
AREA NETWORK COPROCESSOR
Y
Performs Complete CSMA/CD Medium
Access Control (MAC) Functions—
Independently of CPU
— IEEE 802.3 (EOC) Frame Delimiting
Y
Supports Industry Standard LANs
— IEEE TYPE 10BASE-T,
IEEE TYPE 10BASE5 (Ethernet*),
IEEE TYPE 10BASE2 (Cheapernet),
IEEE TYPE 1BASE5 (StarLAN),
and the Proposed Standard
10BASE-F
— Proprietary CSMA/CD Networks Up
to 20 Mb/s
Y
On-Chip Memory Management
— Automatic Buffer Chaining
— Buffer Reclamation after Receipt of
Bad Frames; Optional Save Bad
Frames
— 32-Bit Segmented or Linear (Flat)
Memory Addressing Formats
Y
Network Management and Diagnostics
— Monitor Mode
— 32-Bit Statistical Counters
Y
82586 Software Compatible
Y
Self-Test Diagnostics
Y
Optimized CPU Interface
— Optimized Bus Interface to Intel’s
i486
TM
DX, i486
TM
SX, i487
TM
SX and
80960CA Processors
— 33 MHz, 25 MHz, 20 MHz and 16 MHz
Clock Frequencies
— Supports Big Endian and Little
Endian Byte Ordering
Y
32-Bit Bus Master Interface
— 106 MB/s Bus Bandwidth
— Burst Bus Transfers
— Bus Throttle Timers
— Transfers Data at 100% of Serial
Bandwidth
— 128-Byte Receive FIFO, 64-Byte
Transmit FIFO
Y
Configurable Initialization Root for Data
Structures
Y
High-Speed, 5V, CHMOS** IV
Technology
Y
132-Pin Plastic Quad Flat Pack (PQFP)
and PGA Package
(See Packaging Spec Order No. 240800-001,
Package Type KU and A)
i486 is a trademark of Intel Corporation.
*Ethernet is a registered trademark of Xerox Corporation.
**CHMOS is a patented process of Intel Corporation.
290218–1
Figure 1. 82596CA Block Diagram