© INTEL CORPORATION, 1997 November, 1997 Order Number: 273129-001
ADVANCE INFORMATION
8xC251TA/TB/TP/TQ
HIGH-PERFORMANCE CHMOS MICROCONTROLLER
Commercial/Express
a73 Real-time and Programmed Wait State
Bus Operation
a73 Binary-code Compatible with MCS
®
51
a73 Pin Compatible with 44-pin PLCC and
40-pin PDIP MCS 51 Sockets
a73 Register-based MCS
®
251 Architecture
— 40-byte Register File
— Registers Accessible as Bytes,
Words, or Double Words
a73 Enriched MCS 51 Instruction Set
— 16-bit and 32-bit Arithmetic and
Logic Instructions
— Compare and Conditional Jump
Instructions
— Expanded Set of Move Instructions
a73 Linear Addressing
a73 256-Kbyte Expanded External
Code/Data Memory Space
a73 ROM Options:
16 Kbytes (TB/TQ), 8 Kbytes (TA/TP), or
without ROM
a73 16-bit Internal Code Fetch
a73 64-Kbyte Extended Stack Space
a73 On-chip Data RAM Options:
1-Kbyte (TA/TB) or 512-Byte (TP/TQ)
a73 8-bit, 2-clock External Code Fetch in
Page Mode
a73 Fast MCS 251 Instruction Pipeline
a73 User-selectable Configurations:
— External Wait States (0-3 wait
states)
— Address Range & Memory Mapping
—Page Mode
— Extended Data Float Timings or
8xC251Sx Compatible AC Timings
a73 32 Programmable I/O Lines
a73 Eight Maskable Interrupt Sources with
Four Programmable Priority Levels
a73 Three Flexible 16-bit Timer/counters
a73 Hardware Watchdog Timer
a73 Programmable Counter Array
— High-speed Output
— Compare/Capture Operation
— Pulse Width Modulator
— Watchdog Timer
a73 Two Programmable Serial I/O Ports
— Framing Error Detection
— Automatic Address Recognition
a73 High-performance CHMOS Technology
a73 Static Standby to 24-MHz Operation
a73 Complete System Development
Support
— Compatible with Existing Tools
— MCS 251 Tools Available:
Compiler, Assembler, Debugger,
ICE
a73 Package Options (PDIP and PLCC)