74VHCT373A
器件描述：Octal D-Type Latch with 3-STATE Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：90.87KB，共8页
Sponsor by e络盟器件资料摘要：
© 2005 Fairchild Semiconductor Corporation DS500027 www.fairchildsemi.com
July 1997
Revised April 2005
7
4
VH
CT3
73A Oct
a
l
D-
T
ype Lat
ch
w
i
th
3-
ST
A
T
E
O
u
tput
s
74VHCT373A
Octal D-Type Latch with 3-STATE Outputs
General Description
The VHCT373A is an advanced high speed CMOS octal D-
type latch with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while maintain-
ing the CMOS low power dissipation. This 8-bit D-type
latch is controlled by a latch enable input (LE) and an out-
put enable input (OE). The latches appear transparent to
data when latch enable (LE) is HIGH. When LE is LOW, the
data that meets the setup time is latched. When the OE
input is HIGH, the eight outputs are in a high impedance
state.
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. This device can be used to interface 3V to
5V systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note 1: Outputs in OFF-State.
Features
a73 High speed: t
PD
c32 7.7 ns (typ) at T
A
c32 25c113C
a73 High Noise Immunity: V
IH
c32 2.0V, V
IL
c32 0.8V
a73 Power Down Protection is provided on all inputs and
outputs
a73 Low Power Dissipation:
I
CC
c32 4 c80A (max) @ T
A
c32 25c113C
a73 Pin and Function Compatible with 74HCT373
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74VHCT373AM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHCT373ASJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT373AMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHCT373AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
July 1997
Revised April 2005
7
4
VH
CT3
73A Oct
a
l
D-
T
ype Lat
ch
w
i
th
3-
ST
A
T
E
O
u
tput
s
74VHCT373A
Octal D-Type Latch with 3-STATE Outputs
General Description
The VHCT373A is an advanced high speed CMOS octal D-
type latch with 3-STATE output fabricated with silicon gate
CMOS technology. It achieves the high speed operation
similar to equivalent Bipolar Schottky TTL while maintain-
ing the CMOS low power dissipation. This 8-bit D-type
latch is controlled by a latch enable input (LE) and an out-
put enable input (OE). The latches appear transparent to
data when latch enable (LE) is HIGH. When LE is LOW, the
data that meets the setup time is latched. When the OE
input is HIGH, the eight outputs are in a high impedance
state.
Protection circuits ensure that 0V to 7V can be applied to
the input and output (Note 1) pins without regard to the
supply voltage. This device can be used to interface 3V to
5V systems and two supply systems such as battery back
up. This circuit prevents device destruction due to mis-
matched supply and input voltages.
Note 1: Outputs in OFF-State.
Features
a73 High speed: t
PD
c32 7.7 ns (typ) at T
A
c32 25c113C
a73 High Noise Immunity: V
IH
c32 2.0V, V
IL
c32 0.8V
a73 Power Down Protection is provided on all inputs and
outputs
a73 Low Power Dissipation:
I
CC
c32 4 c80A (max) @ T
A
c32 25c113C
a73 Pin and Function Compatible with 74HCT373
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74VHCT373AM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHCT373ASJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT373AMTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHCT373AN N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide