74VHCT245A
OCTAL BUS
TRANSCEIVER (3-STATE)
PRELIMINARY DATA
August 1999
ORDER CODES :
74VHCT245AM 74VHCT245AT
M
(Micro Package)
n HIGH SPEED: tPD = 4.5 ns (TYP.) at VCC =5V
n LOW POWER DISSIPATION:
ICC =4 µA (MAX.) at TA =25
o
C
n COMPATIBLEWITH TTL OUTPUTS:
VIH =2V(MIN),VIL = 0.8V(MAX)
n POWERDOWN PROTECTIONON INPUTS &
OUTPUTS
n SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL = 8 mA (MIN)
n BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
n OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
n PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 245
n IMPROVED LATCH-UP IMMUNITY
n LOW NOISE: V
OLP
= 0.9V(Max.)
DESCRIPTION
The 74VHCT245A is an advanced high-speed
CMOS OCTAL BUS TRANSCEIVER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
This IC is intended for two-way asynchronous
communication between data busses; the
direction of data trasmission is determined by the
T
(TSSOP Package)
level of the DIR input. The enable input G can be
used to disable the device so that the busses are
effectively isolated.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
IT IS PROHIBITED TO APPLY A SIGNAL TO A
TERMINAL WHEN IT IS IN OUTPUT MODE
AND WHEN A BUS TERMINAL IS FLOATING
(HIGH IMPEDANCE STATE) IT IS REQUESTED
TO FIX THE INPUT LEVEL BY MEANS OF
EXTERNAL PULL DOWN OR PULL UP
RESISTOR.
PIN CONNECTION AND IEC LOGIC SYMBOLS
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