74VHCT20A
DUAL 4-INPUT NAND GATE
PRELIMINARY DATA
February 2000
n HIGH SPEED: tPD = 5 ns (TYP.) at VCC =5V
n LOW POWER DISSIPATION:
ICC =2 µA (MAX.) at TA =25
o
C
n COMPATIBLEWITH TTL OUTPUTS:
VIH =2V(MIN),VIL = 0.8V(MAX)
n POWERDOWN PROTECTIONON INPUTS &
OUTPUTS
n SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL = 8 mA (MIN)
n BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
n OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
n PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 20
n IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74VHCT20A is an advanced high-speed
CMOS DUAL 4-INPUT NAND GATE fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS

SOP TSSOP
ORDER CODES
PACKAGE TUBE T & R
SOP 74VHCT20AM 74VHCT20AMTR
TSSOP 74VHCT20ATTR
1/7