74VHCT138A
器件描述：3-to-8 Decoder/Demultiplexer
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：69.11KB，共6页
Sponsor by e络盟器件资料摘要：
June 1997
Revised April 1999
7
4
VH
CT1
38A 3-
to-
8
Dec
oder/
D
em
ul
ti
pl
exer
© 1999 Fairchild Semiconductor Corporation DS500014.prf www.fairchildsemi.com
74VHCT138A
3-to-8 Decoder/Demultiplexer
General Description
The VHCT138A is an advanced high speed CMOS 3-to-8
DECODER fabricated with silicon gate CMOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
When the device is enabled, 3 Binary Select inputs (A
0
, A
1
and A
2
) determine which one of the outputs (O
0
–O
7
) will go
LOW. When enable input E
3
is held LOW or either E
1
or E
2
is held HIGH, decoding function is inhibited and all outputs
go HIGH. E
3
, E
1
and E
2
inputs are provided to ease cas-
cade connection and for use as an address decoder for
memory systems. Protection circuits ensure that 0V to 7V
can be applied to the input pins without regard to the sup-
ply voltage and to the output pins with V
CC
= 0V. These cir-
cuits prevent device destruction due to mismatched supply
and input/output voltages. This device can be used to inter-
face 3V to 5V systems and two supply systems such as
battery backup.
Features
a73 High Speed: t
PD
= 7.6 ns (typ) at V
CC
= 5V
a73 Low power dissipation: I
CC
= 4 µA (max.) at T
A
= 25°C
a73 Power down protection is provided on all inputs and
outputs
a73 Pin and function compatible with 74HCT138
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
74VHCT138AM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74VHCT138ASJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT138AMTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHCT138AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
A
0
–A
2
Address Inputs
E
1
–E
2
Enable Inputs
E
3
Enable Input
O
0
–O
7
Outputs
Revised April 1999
7
4
VH
CT1
38A 3-
to-
8
Dec
oder/
D
em
ul
ti
pl
exer
© 1999 Fairchild Semiconductor Corporation DS500014.prf www.fairchildsemi.com
74VHCT138A
3-to-8 Decoder/Demultiplexer
General Description
The VHCT138A is an advanced high speed CMOS 3-to-8
DECODER fabricated with silicon gate CMOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
When the device is enabled, 3 Binary Select inputs (A
0
, A
1
and A
2
) determine which one of the outputs (O
0
–O
7
) will go
LOW. When enable input E
3
is held LOW or either E
1
or E
2
is held HIGH, decoding function is inhibited and all outputs
go HIGH. E
3
, E
1
and E
2
inputs are provided to ease cas-
cade connection and for use as an address decoder for
memory systems. Protection circuits ensure that 0V to 7V
can be applied to the input pins without regard to the sup-
ply voltage and to the output pins with V
CC
= 0V. These cir-
cuits prevent device destruction due to mismatched supply
and input/output voltages. This device can be used to inter-
face 3V to 5V systems and two supply systems such as
battery backup.
Features
a73 High Speed: t
PD
= 7.6 ns (typ) at V
CC
= 5V
a73 Low power dissipation: I
CC
= 4 µA (max.) at T
A
= 25°C
a73 Power down protection is provided on all inputs and
outputs
a73 Pin and function compatible with 74HCT138
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
Order Number Package Number Package Description
74VHCT138AM M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74VHCT138ASJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHCT138AMTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHCT138AN N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
A
0
–A
2
Address Inputs
E
1
–E
2
Enable Inputs
E
3
Enable Input
O
0
–O
7
Outputs