April 1994
Revised April 1999
7
4
VH
C43
16
Quad Analog

Swit
ch w
i
th Level

T
r
ansl
ator
© 1999 Fairchild Semiconductor Corporation DS011678.prf www.fairchildsemi.com
74VHC4316
Quad Analog Switch with Level Translator
General Description
These devices are digitally controlled analog switches
implemented in advanced silicon-gate CMOS technology.
These switches have low “on” resistance and low “off” leak-
ages. They are bidirectional switches, thus any analog
input may be used as an output and vice-versa. Three sup-
ply pins are provided on the 4316 to implement a level
translator which enables this circuit to operate with 0V–6V
logic levels and up to ±6V analog switch levels. The 4316
also has a common enable input in addition to each
switch's control which when HIGH will disable all switches
to their off state. All analog inputs and outputs and digital
inputs are protected from electrostatic damage by diodes
to V
CC
and ground.
Features
a73 Typical switch enable time: 20 ns
a73 Wide analog input voltage range: ±6V
a73 Low “on” resistance: 50 typ. (V
CC
−V
EE
= 4.5V)
30 typ. (V
CC
−V
EE
= 9V)
a73 Low quiescent current: 80 µA maximum (74VHC)
a73 Matched switch characteristics
a73 Individual switch controls plus a common enable
a73 Pin functional compatible with 74HC4316

Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Truth Table Connection Diagram
Top View
Logic Diagram
Order Number Package Number Package Description
74VHC4316M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74VHC4316WM M16B 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74VHC4316MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC4316N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Switch
E CTL I/O–O/I
HX “OFF”
LL “OF
LH “N”