July 1994
Revised April 1999
7
4
VH
C27
T
r
ipl
e
3-
I
nput
NO
R
Gate
© 1999 Fairchild Semiconductor Corporation DS011682.prf www.fairchildsemi.com
74VHC27
Triple 3-Input NOR Gate
General Description
The VHC27 is an advanced high speed CMOS 3-Input
NOR Gate fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
The internal circuit is composed of 3 stages including buffer
output, which provide high noise immunity and stable out-
put. An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery backup. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
a73 High speed: t
PD
= 4.1 ns (typ) at T
A
= 25°C
a73 Low power dissipation: I
CC
= 2 µA (max) at T
A
= 25°C
a73 High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
a73 Power down protection is provided on all inputs
a73 Low noise: V
OLP
= 0.8V (max)
a73 Pin and function compatible with 74HC27

Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Pin Descriptions
Connection Diagram
Truth Table
X = Don't Care
Order Number Package Number Package Description
74VHC27M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
74VHC27SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC27MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC27N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Pin Names Description
A
n
, B
n
, C
n
Inputs
Y
n
Outputs
A B C Y
H X X L
X H X L
X X H L
L L L H