74VHC245
器件描述：Octal Bidirectional Transceiver with 3-STATE Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：98.29KB，共7页
Sponsor by e络盟器件资料摘要：
© 2005 Fairchild Semiconductor Corporation DS011520 www.fairchildsemi.com
November 1992
Revised April 2005
7
4
VH
C24
5
Oct
a
l
Bi
dir
ecti
onal
T
r
anscei
ver
wit
h
3-
ST
A
T
E
Output
s
74VHC245
Octal Bidirectional Transceiver with 3-STATE Outputs
General Description
The VHC245 is an advanced high speed CMOS octal bus
transceiver fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipo-
lar Schottky TTL while maintaining the CMOS low power
dissipation. The VHC245 is intended for bidirectional asyn-
chronous communication between data busses. The direc-
tion of data transmission is determined by the level of the
T/R input. The enable input can be used to disable the
device so that the busses are effectively isolated. All inputs
are equipped with protection circuits against static dis-
charge.
Features
a73 High Speed: t
PD
c32 4.0 ns (typ) at V
CC
c32 5V
a73 High Noise Immunity: V
NIH
c32 V
NIL
c32 28% V
CC
(Min)
a73 Power Down Protection is provided on all inputs
a73 Low Noise: V
OLP
c32 0.9V (typ)
a73 Low Power Dissipation:
I
CC
c32 4 c80A (Max) @ T
A
c32 25c113C
a73 Pin and Function Compatible with 74HC245
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Pin Description
Connection Diagram
Truth Table
H c32 HIGH Voltage Level L c32 LOW Voltage Level X c32 Immaterial
Any unused bus terminals during HIGH-Z State must be held HIGH or
LOW.
Order Number Package Number Package Description
74VHC245M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHC245SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC245MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC245N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pin Description
Names
OE Output Enable Input
T/R Transmit/Receive Input
A
0
–A
7
Side A Inputs or 3-STATE Outputs
B
0
–B
7
Side B Inputs or 3-STATE Outputs
Inputs Outputs
OE T/R
L L Bus B Data to Bus A
L H Bus A Data to Bus B
H X HIGH-Z State
November 1992
Revised April 2005
7
4
VH
C24
5
Oct
a
l
Bi
dir
ecti
onal
T
r
anscei
ver
wit
h
3-
ST
A
T
E
Output
s
74VHC245
Octal Bidirectional Transceiver with 3-STATE Outputs
General Description
The VHC245 is an advanced high speed CMOS octal bus
transceiver fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipo-
lar Schottky TTL while maintaining the CMOS low power
dissipation. The VHC245 is intended for bidirectional asyn-
chronous communication between data busses. The direc-
tion of data transmission is determined by the level of the
T/R input. The enable input can be used to disable the
device so that the busses are effectively isolated. All inputs
are equipped with protection circuits against static dis-
charge.
Features
a73 High Speed: t
PD
c32 4.0 ns (typ) at V
CC
c32 5V
a73 High Noise Immunity: V
NIH
c32 V
NIL
c32 28% V
CC
(Min)
a73 Power Down Protection is provided on all inputs
a73 Low Noise: V
OLP
c32 0.9V (typ)
a73 Low Power Dissipation:
I
CC
c32 4 c80A (Max) @ T
A
c32 25c113C
a73 Pin and Function Compatible with 74HC245
Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Pin Description
Connection Diagram
Truth Table
H c32 HIGH Voltage Level L c32 LOW Voltage Level X c32 Immaterial
Any unused bus terminals during HIGH-Z State must be held HIGH or
LOW.
Order Number Package Number Package Description
74VHC245M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHC245SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC245MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC245N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Pin Description
Names
OE Output Enable Input
T/R Transmit/Receive Input
A
0
–A
7
Side A Inputs or 3-STATE Outputs
B
0
–B
7
Side B Inputs or 3-STATE Outputs
Inputs Outputs
OE T/R
L L Bus B Data to Bus A
L H Bus A Data to Bus B
H X HIGH-Z State