© 2005 Fairchild Semiconductor Corporation DS011522 www.fairchildsemi.com
November 1992
Revised April 2005
7
4
VH
C24
4

Oct
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Buf
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/Li
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74VHC244
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHC244 is an advanced high speed CMOS octal bus
buffer fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation. The VHC244 is a non-inverting 3-STATE buffer hav-
ing two active-LOW output enables. These devices are
designed to be used as 3-STATE memory address drivers,
clock drivers, and bus oriented transmitter/receivers.
An input protection circuit ensures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery back up. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
a73 High Speed: t
PD
c32 3.9ns (typ) at V
CC
c32 5V
a73 High noise immunity: V
NIH
c32 V
NIL
c32 28% V
CC
(min)
a73 Power down protection is provided on all inputs
a73 Low noise: V
OLP
c32 0.6V (typ)
a73 Low power dissipation: I
CC
c32 4 c80A (max) @ T
A
c32 25c113C
a73 Pin and function compatible with 74HC244

Ordering Code:
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
IEEE/IEC
Connection Diagram
Order Number Package Number Package Description
74VHC244M M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74VHC244SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC244MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC244N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide