© 2000 Fairchild Semiconductor Corporation DS500228 www.fairchildsemi.com
January 2000
Revised March 2000
7
4
VC
XH163
74
Low V
o
l
t
age
16
-Bit
D
-
T
ype Fli
p
-Fl
op w
i
th Bushol
d
74VCXH16374
Low Voltage 16-Bit D-Type Flip-Flop with Bushold
General Description
The VCXH16374 contains sixteen non-inverting D-type flip-
flops with 3-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and output enable (OE) are common to each byte and
can be shorted together for full 16-bit operation.
The VCXH16374 data inputs include active bushold cir-
cuitry, eliminating the need for external pull-up resistors to
hold unused or floating data inputs at a valid logic level.
The 74VCXH16374 is designed for low voltage (1.65V to
3.6V) V
CC
applications with output compatibility up to 3.6V.
The 74VCXH16374 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
a73 1.65V–3.6V V
CC
supply operation
a73 3.6V tolerant control inputs and outputs
a73 Bushold on data inputs eliminates the need for external
pull-up/pull-down resistors
a73 t
PD

3.0 ns max for 3.0V to 3.6V V
CC
3.9 ns max for 2.3V to 2.7V V
CC
7.8 ns max for 1.65V to 1.95V V
CC
a73 Static Drive (I
OH
/I
OL
)
±24 mA @ 3.0V V
CC
±18 mA @ 2.3V V
CC
±6 mA @ 1.65V V
CC
a73 Uses patented noise/EMI reduction circuitry
a73 Latch-up performance exceeds 300 mA
a73 ESD performance:
Human body model > 2000V
Machine model > 200V

Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol Pin Descriptions
Order Number
Package
Package Descriptions
Number
74VCXH16374MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
CP
n
Clock Pulse Input
I
0
–I
15
Bushold Inputs
O
0
–O
15
Outputs