© 2005 Fairchild Semiconductor Corporation DS500163 www.fairchildsemi.com
July 1999
Revised February 2005
7
4
VC
X86

Low V
o
l
t
age Quad
2-
Inp
u
t Exclusi
ve-
O
R
Gate wit
h

3.
6V T
o
ler
ant Input
s
and Output
s
74VCX86
Low Voltage Quad 2-Input Exclusive-OR Gate with
3.6V Tolerant Inputs and Outputs
General Description
The VCX86 contains four 2-input exclusive OR gates. This
product is designed for low voltage (1.2V to 3.6V) V
CC
applications with I/O compatibility up to 3.6V
The 74VCX86 is fabricated with an advanced CMOS tech-
nology to achieve high-speed operation while maintaining
low CMOS power dissipation.
Features
a73 1.2V to 3.6V V
CC
supply operation
a73 3.6V tolerant inputs and outputs
a73 t
PD
3.0 ns max for 3.0V to 3.6V V
CC
a73 Power-off high impedance inputs and outputs
a73 Static Drive (I
OH
/I
OL
)
c11424 mA @ 3.0V V
CC
a73 Uses patented noise/EMI reduction circuitry
a73 Latchup performance exceeds JEDEC 78 conditions
a73 ESD performance:
Human body model c33 2000V
Machine model c33 250V
a73 Leadless Pb-Free DQFN package

Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1: DQFN package available in Tape and Reel only.
Order Number Package Number Package Description
74VCX86M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
74VCX86BQX
(Note 1)
MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
74VCX86MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide