© 2003 Fairchild Semiconductor Corporation DS500403 www.fairchildsemi.com
March 2001
Revised August 2003
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74VCX32500
Low Voltage 36-Bit Universal Bus Transceivers
with 3.6V Tolerant Inputs and Outputs
General Description
The VCX32500 is an 36-bit universal bus transceiver which
combines D-type latches and D-type flip-flops to allow data
flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the
device operates in the transparent mode when LEAB is
HIGH. When LEAB is LOW, the A data is latched if CLKAB
is held at a HIGH or LOW logic level. If LEAB is LOW, the A
bus data is stored in the latch/flip-flop on the HIGH-to-LOW
transition of CLKAB. When OEAB is HIGH, the outputs are
active. When OEAB is LOW, the outputs are in a high-
impedance state.
Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, and CLKBA. The output enables are com-
plementary (OEAB is active HIGH and OEBA is active
LOW).
The VCX32500 is designed for low voltage (1.4V to 3.6V)
V
CC
applications with I/O capability up to 3.6V.
The 74VCX32500 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing low CMOS power dissipation.
Features
a73 1.4V to 3.6V V
CC
supply operation
a73 3.6V tolerant inputs and outputs
a73 t
PD
(A to B, B to A)
2.9 ns max for 3.0V to 3.6V V
CC
a73 Power-down high impedance inputs and outputs
a73 Supports live insertion/withdrawal (Note 1)
a73 Static Drive (I
OH
/I
OL
)
±24 mA @ 3.0V V
CC
a73 Uses patented noise/EMI reduction circuitry
a73 Latchup performance exceeds 300 mA
a73 ESD performance:
Human body model > 2000V
Machine model >200V
a73 Packaged in plastic Fine-Pitch Ball Grid Array (FBGA)
Note 1: To ensure the high-impedance state during power up or power
down, OEBA should be tied to V
CC
through a pull-up resistor and OEAB
should be tied to GND through a pull-down resistors; the minimum value of
the resistor is determined by the current-sourcing capability of the driver.

Ordering Code:
Note 2: Ordering Code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Order Number Package Number Package Description
74VCX32500G
(Note 2)(Note 3)
BGA114A 114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide