© 2000 Fairchild Semiconductor Corporation DS500159 www.fairchildsemi.com
March 2000
Revised March 2000
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74VCX164245
Low Voltage 16-Bit Dual Supply Translating Transceiver
with 3-STATE Outputs
General Description
The VCX164245 is a dual supply, 16-bit translating trans-
ceiver that is designed for 2 way asynchronous communi-
cation between busses at different supply voltages by
providing true signal translation. The supply rails consist of
V
CCB
, which is the higher potential rail operating at 2.3 to
3.6V and V
CCA
, which is the lower potential rail operating at
1.65 to 2.7V. (V
CCA
must be less than or equal to V
CCB
for
proper device operation.) This dual supply design allows
for translation from 1.8V to 2.5V busses to busses at a
higher potential, up to 3.3V.
The Transmit/Receive (T/R) input determines the direction
of data flow. Transmit (active-HIGH) enables data from A
Ports to B Ports; Receive (active-LOW) enables data from
B Ports to A Ports.The Output Enable (OE) input, when
HIGH, disables both A and P Ports by placing them in a
High-Z condition. The A Port interfaces with the lower volt-
age bus (1.8 − 2.5V); The B Port interfaces with the higher
voltage bus (2.7 − 3.3V). Also the VCX164245 is designed
so that the control pins (T/R
n
, OE
n
) are supplied by V
CCB
.
The 74VCX164245 is suitable for mixed voltage applica-
tions such as notebook computers using a 1.8V CPU and
3.3V peripheral components. It is fabricated with an
Advanced CMOS technology to achieve high speed opera-
tion while maintaining low CMOS power dissipation.
Features
a73 Bidirectional interface between busses ranging from
1.65V to 3.6V
a73 Supports Live Insertion and Withdrawal (Note 1)
a73 Static Drive (I
OH
/I
OL
)
±24 mA @ 3.0V V
CC
±18 mA @ 2.3V V
CC
±6 mA @ 1.65V V
CC
a73 Uses patented noise/EMI reduction circuitry
a73 Functionally compatible with 74 series 16245
a73 Latchup performance exceeds 300 mA
a73 ESD performance:
Human Body Model >2000V
Machine model >200V
Note 1: To ensure the high impedance state during power up or power
down, OE
n
should be tied to V
CCB
through a pull up resistor. The minimum
value of the resistor is determined by the current sourcing capability of the
driver.

Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Diagram Pin Descriptions
Quiet Series is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74VCX164245MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names Description
OE
n
Output Enable Input (Active LOW)
T/R
n
Transmit/Receive Input
A
0
–A
15
Side A Inputs or 3-STATE Outputs
B
0
–B
15
Side B Inputs or 3-STATE Outputs