74VCX132
器件描述：Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs
器件厂商：FAIRCHILD [Fairchild Semiconductor]
文件大小：65KB，共6页
Sponsor by e络盟器件资料摘要：
© 1999 Fairchild Semiconductor Corporation ds500164 www.fairchildsemi.com
July 1999
Revised July 1999
7
4
VC
X13
2
Low V
o
l
t
a
ge
Quad 2-I
nput
NAND
Gat
e
wi
th Schm
i
t
t
T
r
i
gger Input
s and
3.
6V T
o
ler
ant Input
s and
Out
-
pu
ts
74VCX132
Low Voltage Quad 2-Input NAND Gate with
Schmitt Trigger Inputs and 3.6V Tolerant Inputs
and Outputs
General Description
The VCX132 contains four 2-input NAND gates with
Schmitt Trigger Inputs. The pin configuration and function
are the same as the VCX00 except the inputs have hyster-
esis between the positive-going and negative-going input
thresholds. This hysteresis is useful for transforming slowly
switching input signals into sharply defined, jitter-free out-
put signals. This product should be used where noise mar-
gin greater than that of conventional gates is required.
The VCX132 is designed for low voltage (1.65V to 3.6V)
V
CC
applications with I/O compatibility up to 3.6V.
This product is fabricated with an advanced CMOS tech-
nology to achieve high-speed operation while maintaining
low CMOS power dissipation.
Features
a73 1.65V-3.6V V
CC
supply operation
a73 3.6V tolerant inputs and outputs
a73 t
PD
3.3 ns max for 3.0V to 3.6V V
CC
4.1 ns max for 2.3V to 2.7V V
CC
8.2 ns max for 1.65V to 1.95V V
CC
a73 Power-off high impedance inputs and outputs
a73 Static Drive (I
OH
/I
OL
)
±24 mA @ 3.0V V
CC
±18 mA @ 2.3V V
CC
±6 mA @ 1.65V V
CC
a73 Uses patented Quiet Series noise/EMI reduction
circuitry
a73 Latchup performance exceeds 300 mA
a73 ESD performance:
Human body model > 2000V
Machine model > 250V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Diagram
Pin Descriptions
Connection Diagram
Quiet Series is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74VCX132M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
74VCX132MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Name Description
A
n
, B
n
Inputs
O
n
Outputs
July 1999
Revised July 1999
7
4
VC
X13
2
Low V
o
l
t
a
ge
Quad 2-I
nput
NAND
Gat
e
wi
th Schm
i
t
t
T
r
i
gger Input
s and
3.
6V T
o
ler
ant Input
s and
Out
-
pu
ts
74VCX132
Low Voltage Quad 2-Input NAND Gate with
Schmitt Trigger Inputs and 3.6V Tolerant Inputs
and Outputs
General Description
The VCX132 contains four 2-input NAND gates with
Schmitt Trigger Inputs. The pin configuration and function
are the same as the VCX00 except the inputs have hyster-
esis between the positive-going and negative-going input
thresholds. This hysteresis is useful for transforming slowly
switching input signals into sharply defined, jitter-free out-
put signals. This product should be used where noise mar-
gin greater than that of conventional gates is required.
The VCX132 is designed for low voltage (1.65V to 3.6V)
V
CC
applications with I/O compatibility up to 3.6V.
This product is fabricated with an advanced CMOS tech-
nology to achieve high-speed operation while maintaining
low CMOS power dissipation.
Features
a73 1.65V-3.6V V
CC
supply operation
a73 3.6V tolerant inputs and outputs
a73 t
PD
3.3 ns max for 3.0V to 3.6V V
CC
4.1 ns max for 2.3V to 2.7V V
CC
8.2 ns max for 1.65V to 1.95V V
CC
a73 Power-off high impedance inputs and outputs
a73 Static Drive (I
OH
/I
OL
)
±24 mA @ 3.0V V
CC
±18 mA @ 2.3V V
CC
±6 mA @ 1.65V V
CC
a73 Uses patented Quiet Series noise/EMI reduction
circuitry
a73 Latchup performance exceeds 300 mA
a73 ESD performance:
Human body model > 2000V
Machine model > 250V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Diagram
Pin Descriptions
Connection Diagram
Quiet Series is a trademark of Fairchild Semiconductor Corporation.
Order Number Package Number Package Description
74VCX132M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
74VCX132MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Name Description
A
n
, B
n
Inputs
O
n
Outputs